New high radix maximally-redundant signed digit adder

In this contribution, a new architecture for a signed digit numbers adder is presented. The new adder works for signed digit numbers with maximum redundancy. In the new adder, the value of the carry to the next digit can be obtained with a simple logic circuit rather than having to perform an addition and a comparison as in the conventional signed digit adder. When compared to the conventional signed digit adder, the new maximum redundancy signed digit adder is three times faster and requires approximately 50% less area.