Low-sensitivity, low-bounce, high-linearity current-controlled oscillator suitable for single-supply mixed-mode instrumentation system.
暂无分享,去创建一个
[1] U.L. Rohde,et al. Technological scaling and minimization of 1/f noise in SiGe HBTs coupled mode N-Push oscillator/VCO , 2006, 2006 Asia-Pacific Microwave Conference.
[2] C.A.T. Salama,et al. A two-stage differential CCO implementation in submicron CMOS , 2000, Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144).
[3] Guoqing Xu,et al. Improvement and synthesis techniques for low-noise Current Steering Logic (CSL) , 1995, Proceedings of 4th International Conference on Solid-State and IC Technology.
[4] Torsten Lehmann. Using current steering logic in mixed analogue-digital circuits , 1998 .
[5] Jorge R. Fernandes,et al. NMOS current-balanced logic , 1996 .
[6] Jiayong Tian,et al. A freestanding oscillator for resonant-ultrasound microscopy , 2008, IEEE Transactions on Ultrasonics, Ferroelectrics and Frequency Control.
[7] S. Kiaei,et al. Analog logic techniques steer around the noise , 1993, IEEE Circuits and Devices Magazine.
[8] D. J. Allstot,et al. CMOS current steering logic for low-power mixed-signal systems , 1994, Proceedings of 1994 IEEE Symposium on Low Power Electronics.
[9] P. Wambacq,et al. Digital circuit capacitance and switching analysis for ground bounce in ICs with a high-ohmic substrate , 2004, IEEE Journal of Solid-State Circuits.
[10] Georges Gielen,et al. Digital ground bounce reduction by supply current shaping and clock frequency Modulation , 2005 .
[11] B. Wooley,et al. Measuring and modeling the effects of substrate noise on the LNA for a CMOS GPS receiver , 2001, IEEE J. Solid State Circuits.
[12] Manuel Medeiros Silva,et al. A comparison by simulation and by measurement of the substrate noise generated by CMOS, CSL, and CBL digital circuits , 2005, IEEE Transactions on Circuits and Systems I: Regular Papers.
[13] Malgorzata Marek-Sadowska,et al. Clock skew optimization for ground bounce control , 1996, Proceedings of International Conference on Computer Aided Design.
[14] A. Kabbani,et al. Estimation of ground bounce effects on CMOS circuits , 1999 .
[15] B.L. Bhuva,et al. Effects of technology scaling on the SET sensitivity of RF CMOS Voltage-controlled oscillators , 2005, IEEE Transactions on Nuclear Science.
[16] Mohammed Ismail,et al. CMOS VHF/RF CCO based on active inductors , 2001 .
[17] Sied Mehdi Fakhraie,et al. A low-voltage current-controlled oscillator with low supply dependency , 1998, Proceedings of the Tenth International Conference on Microelectronics (Cat. No.98EX186).
[18] Hugo De Man,et al. Digital ground bounce reduction by phase modulation of the clock , 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.
[19] M. Jamal Deen,et al. Phase noise in a back-gate biased low-voltage VCO , 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..
[20] M. Mourey,et al. Predicting phase noise in crystal oscillators , 2005 .
[21] Gyu-Hyeong Cho,et al. CMOS current-controlled oscillators using multiple-feedback-loop ring architectures , 1997 .