5GHz1.4dBNFCMOS LNAintegrated in130nmHighResistivity SOItechnology

CMOSistoday agoodcandidate foranoptimum performances (3)andmoregenerally ofpassive components single chipimplementation ofboththeanalog anddigital blocks performances up tomillimeter wave(4).However, few inwireless mobile transceivers. Concerning analog RF blocks,circuits integrated inCMOS SOItakingadvantage of SOICMOS offer advantages overCMOS bulk, suchasreduced source/drain-substrate capacitance andelimination ofbody effecteoptmzed passive components arereported intheliterature. whicharesuited forlowvoltage supply. Furthermore, SOIoffersSuchresults concerning therealization ofanLNA willbe theopportunity tousehighresistivity substrate leading tohigh discussed hereafter. performances planar inductor andbetter substrate insulation. In this work,thedesign ofa5GHzWLAN LNAina0.13um SOI CMOS technology usingHighResistivity substrate (HR)is II.130NMRFCMOSHRSOITECHNOLOGY discussed. State-of-the-art NF of1.4db@ 5GHzandgainof 14dB@5GHzarereported foraconsumption of8mA under This0.13imSOICMOS technology (ST-H9SOI) (2)is 1.2V. built witha160nmSOIfilm ontopofa400nmburied oxide Index Terms - CMOS,low-noise amplifier (LNA), RF,SOI, andhigh resistivity substrate, with adouble gateoxide process HighResistivity, Integrated Inductor. (2nm/5nm for1.2V/2.5V supply voltage respectively). Fora nominal polygatelength of120nm,amaximumoscillation