Measurement Environment for Reliability Study of High Current First Level Interconnections

Reliability of integrated circuits in electronic packages and connections is a major concern, due to the increasing die size, power dissipation and temperature. The extension of existing interconnection technologies towards higher current/power handling capabilities is a challenging and demanding task. In this paper a powerful system for experimental evaluation and reliability study for high current first level interconnections, up to 20 A, is presented. The system is used for evaluation of wire and flip-chip interconnections.

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