A Block-Parallel SAR ADC for CMOS Image Sensor with 3-D Stacked Structure
暂无分享,去创建一个
K. Kiyoyama | K-W Lee | Takafumi Fukushima | H. Naganuma | H. Kobayashi | Tetsu Tanaka | Mitsumasa Koyanagi
[1] Masaru Uchiyama,et al. Design of Parallel Reconfigurable Image Processor with Three-Dimensional Structure , 2006 .
[2] Abbas El Gamal,et al. A Nyquist rate pixel level ADC for CMOS image sensors , 1998, Proceedings of the IEEE 1998 Custom Integrated Circuits Conference (Cat. No.98CH36143).
[3] Suk Hwan Lim,et al. A 10,000 Frames/s 0.18 μm CMOS Digital Pixel Sensor with Pixel-Level Memory , 2001 .
[4] A. Bermak,et al. A digital pixel sensor array with programmable dynamic range , 2005, IEEE Transactions on Electron Devices.