Complementary GaAs (CGaAs) technology and applications

A self-aligned complementary GaAs (CGaAs) technology has been developed for low-power, high-speed digital and mixed-mode applications. A single process flow has been used to build low-voltage, low-power, full-complementary digital circuits at 200 MHz, high-speed SCFL digital circuits at 5 GHz, RF MMIC and power circuits (900 MHz), and combinations of these. Complementary digital circuits have demonstrated speed-power performance of 0.1 /spl mu/W/MHz/gate at 0.9 V. A mixed SCFL/Complementary signal processor operated at >1 GHz with a speed-power performance of 0.16 /spl mu/W/MHz/gate.

[1]  Carl L. Shurboff,et al.  A manufacturable complementary GaAs process , 1993, 15th Annual GaAs IC Symposium.

[2]  M. LaMacchia,et al.  Complementary GaAs(CGaAs): a high performance BiCMOS alternative , 1995, GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995.

[3]  D. E. Grider,et al.  Development of static random access memories using complementary heterostructure insulated gate field effect transistor technology , 1990, 12th Annual Symposium on Gallium Arsenide Integrated Circuit (GaAs IC).

[4]  C.A.T. Salama,et al.  GaAs Schmitt trigger memory cell design , 1993 .

[5]  Richard B. Brown,et al.  An asynchronous GaAs MESFET static RAM using a new current mirror memory cell , 1993 .

[6]  W. C. Terrell,et al.  Direct replacement of silicon ECL and TTL SRAMs with high performance GaAs devices , 1988, 10th Annual IEEE (GaAs IC) Symposium, Gallium Arsenide Integrated Circuit. Technical Digest 1988..

[7]  H. Greub,et al.  A 500 ps 32 /spl times/ 8 register file implemented in GaAs/AlGaAs HBTs [F-RISC/G processor] , 1993, 15th Annual GaAs IC Symposium.

[8]  Minoru Noda,et al.  A 7ns/850mW GaAs 4Kb SRAM Fully Operative at 75OC , 1988 .

[9]  J. Abrokwah,et al.  0.9 V DSP blocks: a 15 ns 4 K SRAM and a 45 ns 16-bit multiply/accumulator , 1994, Proceedings of 1994 IEEE GaAs IC Symposium.

[10]  I. R. Mactaggart,et al.  A 4 kbit synchronous static random access memory based upon delta-doped complementary heterostructure insulated gate field effect transistor technology , 1991, [1991] GaAs IC Symposium Technical Digest.