RF Modeling of FDSOI Transistors Using Industry Standard BSIM-IMG Model

In this paper, RF modeling and step-by-step parameter extraction methodology of the BSIM-IMG model are discussed with experimental data. BSIM-IMG is the latest industry standard surface potential based model for fully depleted silicon-on-insulator (FDSOI) transistors. The impact of gate, substrate, and thermal networks is demonstrated with S-parameter data, which enable the BSIM-IMG model to capture RF behavior of the FDSOI transistor. The model is validated over a wide range of biases and frequencies and excellent agreement with the experimental data is obtained.

[1]  Suet Fong Tin,et al.  Substrate network modeling for CMOS RF circuit simulation , 1999, Proceedings of the IEEE 1999 Custom Integrated Circuits Conference (Cat. No.99CH36327).

[2]  Mau-Chung Frank Chang,et al.  High-frequency application of MOS compact models and their development for scalable RF model libraries , 1998, Proceedings of the IEEE 1998 Custom Integrated Circuits Conference (Cat. No.98CH36143).

[3]  Chenming Hu,et al.  SOI thermal impedance extraction methodology and its significance for circuit simulation , 2001 .

[4]  R. Gharpurey,et al.  RF MOSFET modeling accounting for distributed substrate and channel resistances with emphasis on the BSIM3v3 SPICE model , 1997, International Electron Devices Meeting. IEDM Technical Digest.

[5]  Denis Flandre,et al.  Variability of UTBB MOSFET analog figures of merit in wide frequency range , 2014, 2014 44th European Solid State Device Research Conference (ESSDERC).

[6]  Pragya Kushwaha,et al.  BSIM-CMG: Standard FinFET compact model for advanced circuit design , 2015, ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC).

[7]  F. Danneville,et al.  Revisited RF Compact Model of Gate Resistance Suitable for High-K/Metal Gate Technology , 2013, IEEE Transactions on Electron Devices.

[8]  B. Jagannathan,et al.  Record RF performance of 45-nm SOI CMOS Technology , 2007, 2007 IEEE International Electron Devices Meeting.

[9]  D.B.M. Klaassen,et al.  Geometry Scaling of the Substrate Loss of RF MOSFETs , 1998, 28th European Solid-State Device Research Conference.

[10]  H. Sunamura,et al.  Ultra-thin-body and BOX (UTBB) fully depleted (FD) device integration for 22nm node and beyond , 2010, 2010 Symposium on VLSI Technology.

[11]  Jean-Olivier Plouchart Applications of SOI Technologies to Communication , 2011, 2011 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS).

[12]  J. Rizk,et al.  RF CMOS technology scaling in High-k/metal gate era for RF SoC (system-on-chip) applications , 2010, 2010 International Electron Devices Meeting.

[13]  Chenming Hu,et al.  Unified Compact Model Covering Drift-Diffusion to Ballistic Carrier Transport , 2016, IEEE Electron Device Letters.

[14]  M. A. Karim,et al.  BSIM-IMG: A Compact Model for Ultrathin-Body SOI MOSFETs With Back-Gate Control , 2012, IEEE Transactions on Electron Devices.

[15]  O. Rozeau,et al.  Multi-$V_{T}$ UTBB FDSOI Device Architectures for Low-Power CMOS Circuit , 2011, IEEE Transactions on Electron Devices.

[16]  Chenming Hu,et al.  BSIM-IMG with improved surface potential calculation recipe , 2014, 2014 Annual IEEE India Conference (INDICON).

[17]  O. Faynot,et al.  Extraction of Isothermal Condition and Thermal Network in UTBB SOI MOSFETs , 2012, IEEE Electron Device Letters.

[18]  Ken Uchida,et al.  Comparison of self-heating effect (SHE) in short-channel bulk and ultra-thin BOX SOI MOSFETs: Impacts of doped well, ambient temperature, and SOI/BOX thicknesses on SHE , 2013, 2013 IEEE International Electron Devices Meeting.

[19]  M.J. Deen,et al.  An effective gate resistance model for CMOS RF and noise modeling , 1998, International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).

[20]  X. Garros,et al.  Low power UTBOX and back plane (BP) FDSOI technology for 32nm node and below , 2011, 2011 IEEE International Conference on IC Design & Technology.

[21]  Francois Danneville,et al.  High frequency performance of sub-100 nm UTB-FDSOI featuring TiN/HfO2 gate stack , 2009 .

[22]  Yogesh Singh Chauhan,et al.  FinFET modeling for IC simulation and design , 2015 .

[23]  V. Kilchytska,et al.  Wide frequency band assessment of 28 nm FDSOI technology platform for analogue and RF applications , 2014, 2014 15th International Conference on Ultimate Integration on Silicon (ULIS).

[24]  Adelmo Ortiz-Conde,et al.  Modeling the Impact of Multi-Fingering Microwave MOSFETs on the Source and Drain Resistances , 2014, IEEE Transactions on Microwave Theory and Techniques.

[25]  Chenming Hu,et al.  Modeling the impact of substrate depletion in FDSOI MOSFETs , 2015 .

[26]  K. De Meyer,et al.  Ultra-thin film fully-depleted SOI CMOS with raised G/S/D device architecture for sub-100 nm applications , 2001 .

[27]  D. Flandre,et al.  Floating effective back-gate effect on the small-signal output conductance of SOI MOSFETs , 2003, IEEE Electron Device Letters.

[28]  S. P. Voinigescu,et al.  An assessment of the state-of-the-art 0.5 /spl mu/m bulk CMOS technology for RF applications , 1995, Proceedings of International Electron Devices Meeting.

[29]  Chenming Hu,et al.  BSIM-IMG: Compact model for RF-SOI MOSFETs , 2015, 2015 73rd Annual Device Research Conference (DRC).

[30]  O. Rozeau,et al.  High immunity to threshold voltage variability in undoped ultra-thin FDSOI MOSFETs and its physical understanding , 2008, 2008 IEEE International Electron Devices Meeting.

[31]  Ali M. Niknejad,et al.  A computationally efficient compact model for fully-depleted SOI MOSFETs with independently-controlled front- and back-gates , 2011 .

[32]  Alvin Joseph,et al.  High performance SOI RF switches for wireless applications , 2010, 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology.

[33]  William Redman-White,et al.  Self-heating effects in SOI MOSFETs and their measurement by small signal conductance techniques , 1996 .

[34]  G.D.J. Smit,et al.  Experimental assessment of self-heating in SOI FinFETs , 2009, 2009 IEEE International Electron Devices Meeting (IEDM).

[35]  Julio Costa Passing the Plateau of Productivity: Development of RFSOI Technologies on HR Silicon Substrates for Reconfigurable Wireless Solutions , 2014, IEEE Microwave Magazine.

[36]  S. Makovejev,et al.  RF Extraction of Self-Heating Effects in FinFETs , 2011, IEEE Transactions on Electron Devices.

[37]  Christian Enz MOS transistor modeling for RF integrated circuit design , 2000, Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044).

[38]  O. Faynot,et al.  Self-heating and substrate effects in ultra-thin body ultra-thin BOX devices , 2011, Ulis 2011 Ultimate Integration on Silicon.