An a VLSI driving circuit for memristor-based STDP

The main goal in realizing a VLSI (analog VLSI) systems able to mimic functionalities of biological neural networks is pointed to the reproduction of realistic synapses. Indeed, because of the relative high synapse/neuron ratio, especially in the case of extremely dense networks (i.e., reproduction of a real scenario), synapses represent a considerable limitation in terms of waste of silicon area and power consumption as well. Thanks to advancement made in the implementation of memristor, the interest in bio-inspired neural network design has been renewed. Memristors have tunable resistance which depends on its past state; this is analogous to the operating mode of biological synapses. In this paper, we present the circuit implementation of a simple memristor-based neural network. Here, we propose a driving circuit model that not requires specific shape input pulses to change the memristor conductance (i.e., synaptic strength), but it can be driven by arbitrary shaped input pulses. Moreover, this prototype circuit offers the chance of emulating the standard STDP behavior allowing “controlled” changes for the synaptic weights. Some preliminary experimental results are reported to validate the proposed driving circuit.

[1]  Gregory S. Snider,et al.  Spike-timing-dependent learning in memristive nanodevices , 2008, 2008 IEEE International Symposium on Nanoscale Architectures.

[2]  T. Serrano-Gotarredona,et al.  STDP and STDP variations with memristors for spiking neuromorphic learning systems , 2013, Front. Neurosci..

[3]  Roger D. Traub,et al.  Rates and Rhythms: A Synergistic View of Frequency and Temporal Coding in Neuronal Networks , 2012, Neuron.

[4]  H. Sompolinsky,et al.  The tempotron: a neuron that learns spike timing–based decisions , 2006, Nature Neuroscience.

[5]  Gian Carlo Cardarilli,et al.  Spiking neural networks based on LIF with latency: Simulation and synchronization effects , 2013, 2013 Asilomar Conference on Signals, Systems and Computers.

[6]  R. FitzHugh.  Mathematical models of threshold phenomena in the nerve membrane , 1955 .

[7]  Alessandro Cristini,et al.  A Continuous-Time Spiking Neural Network Paradigm , 2015, Advances in Neural Networks.

[8]  Giacomo Indiveri,et al.  Integration of nanoscale memristor synapses in neuromorphic computing architectures , 2013, Nanotechnology.

[9]  Nicholas T. Carnevale,et al.  Simulation of networks of spiking neurons: A review of tools and strategies , 2006, Journal of Computational Neuroscience.

[10]  G. Subramanyam,et al.  A Memristor Device Model , 2011, IEEE Electron Device Letters.

[11]  Vishal Saxena,et al.  Homogeneous Spiking Neuromorphic System for Real-World Pattern Recognition , 2015, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

[12]  Fabien Alibart,et al.  Plasticity in memristive devices for spiking neural networks , 2015, Front. Neurosci..

[13]  M. Diamond,et al.  The Role of Spike Timing in the Coding of Stimulus Location in Rat Somatosensory Cortex , 2001, Neuron.

[14]  Vishal Saxena,et al.  A CMOS Spiking Neuron for Brain-Inspired Neural Networks With Resistive Synapses and In Situ Learning , 2015, IEEE Transactions on Circuits and Systems II: Express Briefs.

[15]  Hsien-Hsin S. Lee,et al.  Architectural evaluation of 3D stacked RRAM caches , 2009, 2009 IEEE International Conference on 3D System Integration.

[16]  Bernabé Linares-Barranco,et al.  On Spike-Timing-Dependent-Plasticity, Memristive Devices, and Building a Self-Learning Visual Cortex , 2011, Front. Neurosci..

[17]  Leon O. Chua,et al.  Circuit Elements With Memory: Memristors, Memcapacitors, and Meminductors , 2009, Proceedings of the IEEE.

[18]  T. Serrano-Gotarredona,et al.  Design of adaptive nano/CMOS neural architectures , 2012, 2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012).

[19]  L. Chua.  Memristor-The missing circuit element , 1971 .

[20]  John O'Keefe,et al.  Independent rate and temporal coding in hippocampal pyramidal cells , 2003, Nature.

[21]  Eugene M Izhikevich,et al.  Hybrid spiking models , 2010, Philosophical Transactions of the Royal Society A: Mathematical, Physical and Engineering Sciences.

[22]  Eugene M. Izhikevich,et al.  Dynamical Systems in Neuroscience: The Geometry of Excitability and Bursting , 2006 .

[23]  Cory Merkel,et al.  Reconfigurable Memristor Fabrics for Heterogeneous Computing , 2012 .

[24]  L. Abbott,et al.  Synaptic plasticity: taming the beast , 2000, Nature Neuroscience.

[25]  Eugene M. Izhikevich,et al.  Which model to use for cortical spiking neurons? , 2004, IEEE Transactions on Neural Networks.

[26]  Massimiliano Di Ventra,et al.  Experimental demonstration of associative memory with memristive neural networks , 2009, Neural Networks.

[27]  G. Bi,et al.  Synaptic Modifications in Cultured Hippocampal Neurons: Dependence on Spike Timing, Synaptic Strength, and Postsynaptic Cell Type , 1998, The Journal of Neuroscience.

[28]  Stefano Panzeri,et al.  Reading spike timing without a clock: intrinsic decoding of spike trains , 2014, Philosophical Transactions of the Royal Society B: Biological Sciences.

[29]  Gang Zheng,et al.  Chaotic solutions in the quadratic integrate-and-fire neuron with adaptation , 2009, Cognitive Neurodynamics.