Current-reused divide-by-3 injection-locked frequency divider in 65 nm CMOS

A current-reused divide-by-3 injection-locked frequency divider (ILFD) is realised in a 65 nm CMOS process. This divide-by-3 ILFD achieves the input locking range from 117.45 to 118.38 GHz and its power consumption is 12 mW for a supply of 1.3 V excluding buffers and the biasing circuit. This divide-by-3 ILFD achieves the higher operational frequency and lower power dissipation.

[1]  P. Heydari,et al.  A BiCMOS Dual-Band Millimeter-Wave Frequency Synthesizer for Automotive Radars , 2009, IEEE Journal of Solid-State Circuits.

[2]  Zhiming Chen,et al.  Design and Analysis of a Silicon-Based Millimeter-Wave Divide-by-3 Injection-Locked Frequency Divider , 2009, 2009 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems.

[3]  Huei Wang,et al.  A 66–72 GHz divide-by-3 injection-locked frequency divider in 0.13-μm CMOS technology , 2007, 2007 IEEE Asian Solid-State Circuits Conference.

[4]  Y.-J.E. Chen,et al.  A 60-GHz 0.13-$\mu{\hbox{m}}$ CMOS Divide-by-Three Frequency Divider , 2008, IEEE Transactions on Microwave Theory and Techniques.