A hardware implementation method of the Aihara chaotic neural network
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[1] K. Aihara,et al. Chaotic neural networks , 1990 .
[2] R.H. Lee,et al. Methodology and Design Flow for Assisted Neural-Model Implementations in FPGAs , 2007, IEEE Transactions on Neural Systems and Rehabilitation Engineering.
[3] Yu-chen Wu,et al. Development and Application of Artificial Neural Network , 2017, Wireless Personal Communications.
[4] Wang Jiang. FPGA application in neural system model simulation , 2011 .
[5] Kate Smith-Miles,et al. Experimental analysis of chaotic neural network models for combinatorial optimization under a unifying framework , 2000, Neural Networks.
[6] Randall K Weinstein,et al. Architectures for high-performance FPGA implementations of neural models , 2006, Journal of neural engineering.