Electromigration reliability enhancement via bus activity distribution

Electromigration induced degradation in integrated circuits has been accelerated by continuous scaling of device dimensions. We present a methodology for synthesizing high-reliability and low-energy microarchitectures at the RT level by judiciously binding and scheduling the data transfers of a control data flow graph (CDFG) representation of the application onto the buses in the microarchitecture. The proposed method accounts for correlations between data transfers and the constraints on the number of buses, area and delay.

[1]  J. Joseph Clement,et al.  Electromigration Reliability of VLSI Interconnect , 1992, Digit. Tech. J..

[2]  Ping Yang,et al.  SPIDER -- A CAD System for Modeling VLSI Metallization Patterns , 1987, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[3]  Chenming Hu,et al.  Projecting interconnect electromigration lifetime for arbitrary current waveforms , 1990 .

[4]  Kaushik Roy,et al.  Logic synthesis for reliability—an early start to controlling electromigration and hot carrier effects , 1994, EURO-DAC '94.

[5]  A. Christou.  Electromigration and electronic device degradation , 1994 .

[6]  Lance A Glasser,et al.  RELIC: A Reliability Simulator for Integrated Circuits, , 1987 .

[7]  Farid N. Najm,et al.  Transition density, a stochastic measure of activity in digital circuits , 1991, 28th ACM/IEEE Design Automation Conference.

[8]  Ramesh Karri,et al.  Hot-carrier reliability enhancement via input reordering and transistor sizing , 1996, DAC '96.

[9]  Chenming Hu,et al.  The Berkeley reliability simulator BERT: an IC reliability simulator , 1992 .

[10]  Ibrahim N. Hajj,et al.  CREST-a current estimator for CMOS circuits , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.

[11]  Ramesh Karri,et al.  High-reliability, low-energy microarchitecture synthesis , 1998, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[12]  William J. Bowhill,et al.  Circuit Implementation of a 300-MHz 64-bit Second-generation CMOS Alpha CPU , 1995, Digit. Tech. J..

[13]  J. Maiz.  Characterization of electromigration under bidirectional (BC) and pulsed unidirectional (PDC) currents , 1989 .