RSMT construction algorithm based on Congestion-Oriented Flexibility

As complexity of VLSI circuits grows, routability has been one of the key factors considered by tree construction algorithms in global routing. Flexibility is a geometric structural property of rectilinear Steiner minimal tree (RSMT), and it is expected to accord with routability and therefore predict the overflow situation. Reference [9] proposed a new definition of flexibility of RSMT, combining RSMT's original flexibility and genetic flexibility, and proved the efficiency of predicting routability utilizing experimental results. However, the flexibility is defined according to the RSMT structure, failing to consider different circumstances of congestion distribution. In order to fix this flaw, we propose the new concept of Congestion-Oriented Flexibility. Further, we propose an effective algorithm to enhance the generalized flexibility. Finally, an RSMT Construction Algorithm based on Congestion-Oriented Flexibility is proposed, which is demonstrated to create a routing result with 12.1% less congestion than FLUTE [1] and congestion-driven Steiner trees [2].

[1]  马坤,et al.  Flexibility in Rectilinear Steiner Minimal Tree , 2014 .

[2]  Yue Xu,et al.  FastRoute 4.0: Global router with efficient via minimization , 2009, 2009 Asia and South Pacific Design Automation Conference.

[3]  Min Pan,et al.  FastRoute: A Step to Integrate Global Routing into Placement , 2006, 2006 IEEE/ACM International Conference on Computer Aided Design.

[4]  C. Chu.  FLUTE: fast lookup table based wirelength estimation technique , 2004, IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004..

[5]  Jason Cong,et al.  Routability-driven placement and white space allocation , 2004, IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004..

[6]  Majid Sarrafzadeh,et al.  Creating and exploiting flexibility in rectilinear Steiner trees , 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[7]  D. Bhatia,et al.  On metrics for comparing routability estimation methods for FPGAs , 2002, Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324).

[8]  Majid Sarrafzadeh,et al.  Creating and exploiting flexibility in Steiner trees , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

[9]  Wei Li,et al.  Routability prediction for hierarchical FPGAs , 1999, Proceedings Ninth Great Lakes Symposium on VLSI.

[10]  Rob A. Rutenbar,et al.  FPGA routing and routability estimation via Boolean satisfiability , 1997, FPGA '97.