Single-resonator dual-frequency AIN-on-Si MEMS oscillators

This paper reports on the design, implementation, and phase-noise optimization of low-power interface IC for dual-frequency oscillators that utilize two high quality factor (Q) width-extensional bulk acoustic modes of the same AlN-on-silicon resonator. Two 0.5-μm CMOS transimpedance amplifiers (TIA) have been designed, characterized, and interfaced with two dual-mode resonators operating at 35.5/105.7 MHz (first/third order modes) and 35.5/174.9 MHz (first/ fifth order modes). One TIA uses open-loop regulated cascode (RGC) topology in the first stage to enable low power operation, whereas the second one uses an inverter with shunt-shunt feedback to deliver higher gain with lower phase noise. An on-chip switching network is incorporated into each TIA to change the oscillation frequency based on the different phase shift. The effect of TIA on the phase-noise performance of oscillators is studied and compared for both topologies. The measured phase noise of low- and high-frequency modes at 1 kHz offset from carrier are -114 and -108 dBc/Hz for the 35/105 MHz oscillator, and -108 and -105 dBc/Hz for the 35/175 MHz oscillator, respectively, whereas the far-from-carrier reaches below -140 dBc/Hz in all cases.

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