A fully integrated low-IF DVB-T receiver architecture
暂无分享,去创建一个
We propose a fully integrated DVB-T receiver architecture for low cost CMOS implementation. The receiver uses a dual-IF architecture to cover the receive bands from 170 MHz to 862 MHz and a low-IF of 4.57 MHz. Key performance values meet the DVB-T requirements with competitive performance (sensitivity 72.5 dBm, noise figure 6.6 dB, adjacent channel protection ratio (ACPR)= -43 dB, available SNR=28 dB) and suggest that low cost receivers are realistic in volume for the coming digital broadcasting systems.
[1] Behzad Razavi,et al. RF Microelectronics , 1997 .
[2] Jose C. Pedro,et al. On the use of multitone techniques for assessing RF components' intermodulation distortion , 1999 .
[3] David A. Johns,et al. Analog Integrated Circuit Design , 1996 .
[4] M. Dawkins,et al. A single-chip tuner for DVB-T , 2003, IEEE J. Solid State Circuits.