Design and Implementation of Domino Logic Circuit in CMOS
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[1] Liang Chen,et al. Timing verification of dynamic circuits , 1995, Proceedings of the IEEE 1995 Custom Integrated Circuits Conference.
[2] Yiorgos Tsiatouhas,et al. Testable Designs of Multiple Precharged Domino Circuits , 2007, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[3] C. Sechen,et al. Domino logic synthesis using complex static gates , 1998, 1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287).
[4] Wen-Ben Jone,et al. Charge-sharing alleviation and detection for CMOS domino circuits , 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[5] Chandrakala,et al. Energy-Efficient, Noise-Tolerant CMOS Domino VLSI Circuits in VDSM Technology , 2011 .
[6] Volkan Kursun,et al. FinFET domino logic with independent gate keepers , 2009, Microelectron. J..
[7] James D. Meindl,et al. Three phase domino logic circuit , 2002, 15th Annual IEEE International ASIC/SOC Conference.
[8] Yiorgos Tsiatouhas,et al. Novel domino logic designs , 1999, ICECS'99. Proceedings of ICECS '99. 6th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.99EX357).
[9] Zhiyu Liu,et al. Leakage Power Characteristics of Dynamic Circuits in Nanometer CMOS Technologies , 2006, IEEE Transactions on Circuits and Systems II: Express Briefs.
[10] Salendra. Govindarajulu,et al. Low Power , Reduced Dynamic Voltage Swing Domino Logic Circuits , 2010 .
[11] Vojin G. Oklobdzija,et al. Design-performance trade-offs in CMOS-domino logic , 1986 .
[12] C.A.T. Salama,et al. Latched domino CMOS logic , 1986 .