Advantage of further scaling in gate dielectrics below 0.5 nm of equivalent oxide thickness with La2O3 gate dielectrics

Abstract N-type metal–oxide–semiconductor field-effect transistor (MOSFET) with an equivalent oxide thickness (EOT) of 0.37 nm has been demonstrated with La2O3 as a gate dielectric for the first time. Despite the existence of parasitic capacitances at gate electrode and inversion layer in the channel, a sufficient drain current increment in both linear and saturation regions have been observed, while scaling the gate oxide from 0.48 to 0.37 nm in EOT. Therefore, continuous scaling of EOT below 0.5 nm is still effective for further improvement in device performance.

[1]  Hiroshi Iwai,et al.  Effect of Oxygen for Ultra-Thin La2O3 Film Deposition , 2006 .

[2]  J. Welser,et al.  Electric-field penetration into metals: consequences for high-dielectric-constant capacitors , 1999 .

[3]  R. Wallace,et al.  High-κ gate dielectrics: Current status and materials properties considerations , 2001 .

[4]  Shinichi Takagi,et al.  Experimental Evidence of Inversion-Layer Mobility Lowering in Ultrathin Gate Oxide Metal-Oxide-Semiconductor Field-Effect-Transistors with Direct Tunneling Current , 2002 .

[5]  N. Fukushima,et al.  Ultra-thin (EOT=3/spl Aring/) and low leakage dielectrics of La-alminate directly on si substrate fabricated by high temperature deposition , 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..

[6]  Yasuhiro Shimamoto,et al.  Remote-charge-scattering limited mobility in field-effect transistors with SiO2 and Al2O3∕SiO2 gate stacks , 2005 .

[7]  H. Iwai,et al.  1.5 nm direct-tunneling gate oxide Si MOSFET's , 1996 .

[8]  Shinichi Takagi,et al.  Characterization of inversion-layer capacitance of holes in Si MOSFET's , 1999 .

[9]  Hiroshi Iwai,et al.  CMOS technology-year 2010 and beyond , 1999, IEEE J. Solid State Circuits.

[10]  Kenji Natori,et al.  Capacitance Due to the Charge Layer Thickness in Nanoscale Capacitors , 2005 .

[11]  J. Kavalieros,et al.  Gate dielectric scaling for high-performance CMOS: from SiO2 to high-K , 2003, Extended Abstracts of International Workshop on Gate Insulator (IEEE Cat. No.03EX765).