Design of the 1.5 and 2.5 Bit MDAC - application opportunities
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The paper presents design and simulation of the most important stage in pipelined analog-to-digital converter (ADC) so-called multiplying digital-to-analog converter (MDAC). The MDAC with 1,5 and 2,5 bit of resolution were designed using CMOS 0.7 μm technology. The both types of MDAC were compared and the results are also presented. All stages were proposed utilizing Cadence design software.
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