A novel method for improving the data access on fir throughput data path architecture balanced performance properties

Embodiments of the present invention discloses a novel method of FIR data access operation on the performance balance for increasing throughput data path architecture. Discloses a method and apparatus for implementing the method involves multiply-accumulate (MAC) operation of the digital signal processing operations by using a modified model data structure and access structure balanced. This architecture is maintained as a data path, the data path connected to an address generating unit, a register file and an execution unit MAC. A register file having a separate packet classification register organization, the organization reduces the memory cycle misalignment bubble caused. This architecture uses parallel execution per cycle and may implement two or more MAC operation.