论文信息 - Dynamic SEE Testing of Selected Architectural Features of Xilinx 28 nm Virtex-7 FPGAs

Dynamic SEE Testing of Selected Architectural Features of Xilinx 28 nm Virtex-7 FPGAs

Recent proton and heavy ion SEE data are presented for selected Virtex-7 architectural features requiring dynamic in-beam testing: I/O blocks in various modes, IOSERDES, digital- and phase-locked loop clocks, and block memory’s error correction circuitry.

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