A digital neuro-chip with unlimited connectability for large scale neural networks

A digital neurochip has been fabricated by using a 1.3- mu m CMOS gate array. Six neurons and 84 synapses are implemented in the chip. The output of each neuron is encoded by impulse density and each synapse has 64 levels of modifiable weight. By simply connecting chips, a neural network can be scaled up without limit. A neural network board has been made to simulate a neural network of 54 neurons fully interconnected by excitatory and inhibitory synapses. The network is controlled by a digital computer. Synaptic weights and the internal potential of each neuron can be set and monitored by the computer. A wide range of neural networks can be simulated by the neural network board in combination with the computer.<<ETX>>

[1]  Philippe Hurat,et al.  A RECONFIGURABLE W.S.I. NEURAL NETWORK , 1989 .

[2]  J J Hopfield,et al.  Neurons with graded response have collective computational properties like those of two-state neurons. , 1984, Proceedings of the National Academy of Sciences of the United States of America.

[3]  Jin Luo,et al.  Computing motion using analog and binary resistive networks , 1988, Computer.

[4]  A. A. Abidi,et al.  An Analog CMOS Backward Error-propagation LSI , 1988, Twenty-Second Asilomar Conference on Signals, Systems and Computers.

[5]  Carver A. Mead,et al.  VLSI architectures for implementation of neural networks , 1987 .

[6]  F. Blayo,et al.  A reconfigurable WSI neural network , 1989, [1989] Proceedings International Conference on Wafer Scale Integration.