Nano Imprint Lithography (NIL) is valued as a cost effective alternative to other Next Generation Lithography (NGL) choices, especially for memory device applications. In order to achieve an attractive Cost of Ownership (CoO), replicas are made from a master and those replicas are then used in the actual pattern transfer onto the device wafer. During the pattern transfer process from a template to a device wafer, droplets of imaging material are applied to the surface of the substrate, in the area where the imaging is to take place. The image to be transferred is then brought into direct contact with the imaging material, at which time it will spread between the two surfaces by means of capillary force, and the imaging material is then solidified through UV irradiation. As the template is pulled away, it leaves its image imprinted into the imaging material. Any resist adhering to the template will cause defects in subsequent imprints, hence such template contamination, so called resist plugs, must either be avoided or removed. This work focuses on the resist removal techniques employing ambient pressure plasma, and their benefit to improve throughput, i.e. CoO. In our studies, we found that resist removal efficiency is highly depending on the process gas mixture and the process temperature. This dry cleaning process has a good potential as an efficient in-line imprint mask cleaning system.
[1]
Mark Neisser,et al.
ITRS lithography roadmap: 2015 challenges
,
2015
.
[2]
Hiromi Hiura,et al.
Nanoimprint system development and status for high volume semiconductor manufacturing
,
2016,
European Mask and Lithography Conference.
[3]
Zhengmao Ye,et al.
High-throughput jet and flash imprint lithography for advanced semiconductor memory
,
2014,
Advanced Lithography.
[4]
Naoya Hayashi,et al.
Effects of cleaning on NIL templates: surface roughness, CD, and pattern integrity
,
2011,
Photomask Technology.
[5]
Uwe Dietze,et al.
Automated imprint mask cleaning for step-and-flash imprint lithography
,
2009,
Advanced Lithography.