Semiconductor device including a precharge control circuit and precharge method thereof

PURPOSE: A semiconductor device having a precharge control circuit and a precharge method are provided to reduce a writing time by changing a precharge scheme in a semiconductor device such as MML and a memory device. CONSTITUTION: A pair of bit lines is connected to many memory cells(301). A pair of Input/output(I/O) lines is connected to the pair of bit lines via a column selection gate(305). A precharge circuit precharges/equalizes the pair of I/O lines in response to a precharge signal in case of a writing operation and a reading operation. I/O line driver receives an input data in response to an enable signal during the writing operation, and drives the pair of I/O lines. A precharge control circuit(311) generates the precharge signal in response to a precharge control signal informing the precharge operation starting and the enable signal so as to make the precharge/equalizing time in case of the writing operation be shorter than the precharge/equalizing time in case of the reading operation. The enable signal is enabled prior to a predetermined time at which a column selection line for controlling the column selection gate is enabled. The precharge signal is disabled by enabling the enable signal.