Metastability-Induced TRNG Architecture on FPGA

Due to the emerging high-speed digital infrastructure, the protection of data being shared throughout the open networks has been a challenging task. By large, the dependency on cryptographic primitives exists to encounter cyberspace challenges. Key generation is a core process of any cryptographic application which improvises the strength of the algorithm. Reconfigurable hardware-assisted true random number generators (TRNGs) play a crucial role in key generation to provide high-speed cryptographic solutions. In this work, metastability-influenced TRNG architecture on Altera Cyclone II EP2C20F484C7 FPGA has been proposed. The 256 units of SR latches with de-synchronisation technique were the prime source used to harvest the true randomness. TRNG design consumed 1851 logic elements with a dynamic power dissipation of 4.41 mW. Proposed architecture achieves a high throughput of 26.64065 Mbps using 27 MHz onboard sampling clock. This TRNG has been validated through entropy, correlation, NIST SP 800-22 batteries of test, linear complexity test, restart experiment and hamming distance analysis.

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