Distributed synchronization for message-passing based embedded multiprocessors

This paper presents a distributed synchronization architecture for message-passing based embedded multiprocessors. The proposed solution effectively realizes the lock and barrier protocols in a completely decentralized manner without traffic contention. We implement the proposed mechanism using application-specific instruction-set processor (ASIP) techniques to speed up the message passing and handling. Experimental results show the proposed synchronization achieves ultra-low latency and almost ideal scalability when the number of processors increases.