Memory Efficient Scheduling for Multicore Real-time Systems

Modern real-time systems are becoming increasingly complex and requiring significant computational power to meet their demands. Since the increase in uniprocessor speed has slowed down in the last decade, multicore processors are now the preferred way to supply the increased performance demand of real-time systems. A significant amount of work in the real-time community has focused on scheduling solutions for multicore processors for both sequential and parallel real-time tasks. Even though such solutions are able to provide strict timing guarantees on the overall response time of real-time tasks, they rely on the assumption that the worst-case execution time (WCET) of each individual task is known. However, physical shared resources such as main memory and I/O are heavily employed in multicore processors. These resources are limited and therefore subject to contention. In fact, the execution time of one task when run in parallel with other tasks is significantly larger than the execution time of the same task when run in isolation. In addition, the presence of shared resources increases the timing unpredictability due to the conflicts generated by multiple cores. As a result, the adoption of multicore processors for real-time systems is dependent upon solving such sources of unpredictability. In this dissertation, we investigate memory bus contention. In particular, two main problems are associated with memory contention: (1) unpredictable behavior and (2) hindrance of performance. We show how to mitigate these two problems through scheduling. Scheduling is an attractive tool that can be easily integrated into the system without the need for hardware modifications. We adopt an execution model that exposes memory as a resource to the scheduling algorithm. Thus, the theory of real-time multiprocessor scheduling, that has seen significant advances in recent years, can be utilized to schedule both processor cores and memory. Since the real-time workload on multicore processors can be modeled as sequential or parallel tasks, we also study parallel task scheduling by taking memory time into account.

[1]  Francisco J. Cazorla,et al.  An Analyzable Memory Controller for Hard Real-Time CMPs , 2009, IEEE Embedded Systems Letters.

[2]  Rodolfo Pellizzoni,et al.  Memory efficient global scheduling of real-time tasks , 2015, 21st IEEE Real-Time and Embedded Technology and Applications Symposium.

[3]  Michele Cirinei,et al.  Response-Time Analysis for Globally Scheduled Symmetric Multiprocessor Platforms , 2007, 28th IEEE International Real-Time Systems Symposium (RTSS 2007).

[4]  Takeshi Ogasawara,et al.  An algorithm with constant execution time for dynamic storage allocation , 1995, Proceedings Second International Workshop on Real-Time Computing Systems and Applications.

[5]  Wei Zhang,et al.  Static Timing Analysis of Shared Caches for Multicore Processors , 2012, J. Comput. Sci. Eng..

[6]  Yun Liang,et al.  Timing analysis of concurrent programs running on shared cache multi-cores , 2009, 2009 30th IEEE Real-Time Systems Symposium.

[7]  Robert Tappan Morris,et al.  An Analysis of Linux Scalability to Many Cores , 2010, OSDI.

[8]  Michael Paulitsch,et al.  Monitoring and WCET analysis in COTS multi-core-SoC-based mixed-criticality systems , 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[9]  Marco Caccamo,et al.  A Real-Time Scratchpad-Centric OS for Multi-Core Embedded Systems , 2016, 2016 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS).

[10]  Lothar Thiele,et al.  Timing Analysis for TDMA Arbitration in Resource Sharing Systems , 2010, 2010 16th IEEE Real-Time and Embedded Technology and Applications Symposium.

[11]  Tulika Mitra,et al.  Scratchpad allocation for concurrent embedded software , 2010, TOPL.

[12]  Francisco J. Cazorla,et al.  A cache design for probabilistically analysable real-time systems , 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[13]  Alan Burns,et al.  A survey of hard real-time scheduling for multiprocessor systems , 2011, CSUR.

[14]  Sanjoy K. Baruah Improved Multiprocessor Global Schedulability Analysis of Sporadic DAG Task Systems , 2014, 2014 26th Euromicro Conference on Real-Time Systems.

[15]  Chenyang Lu,et al.  Multi-core real-time scheduling for generalized parallel task models , 2011, 2011 IEEE 32nd Real-Time Systems Symposium.

[16]  Peter Sanders,et al.  Energy Efficient Frequency Scaling and Scheduling for Malleable Tasks , 2012, Euro-Par.

[17]  Stephen A. Edwards,et al.  Predictable programming on a precision timed architecture , 2008, CASES '08.

[18]  Giorgio Buttazzo,et al.  Hard Real-Time Computing Systems: Predictable Scheduling Algorithms and Applications , 1997 .

[19]  Björn Andersson,et al.  The utilization bounds of partitioned and pfair static-priority scheduling on multiprocessors are 50% , 2003, 15th Euromicro Conference on Real-Time Systems, 2003. Proceedings..

[20]  Robert I. Davis,et al.  OUTSTANDING PAPER: Evaluation of Cache Partitioning for Hard Real-Time Systems , 2014, 2014 26th Euromicro Conference on Real-Time Systems.

[21]  Petru Eles,et al.  Time-Predictable Embedded Software on Multi-Core Platforms: Analysis and Optimization , 2014, Found. Trends Electron. Des. Autom..

[22]  Wang Yi,et al.  Schedulability analysis for non-preemptive fixed-priority multiprocessor scheduling , 2011, J. Syst. Archit..

[23]  Martin Schoeberl,et al.  Time-predictable chip-multiprocessor design , 2010, 2010 Conference Record of the Forty Fourth Asilomar Conference on Signals, Systems and Computers.

[24]  Daniel F. Garcia,et al.  Utilization Bounds for EDF Scheduling on Real-Time Multiprocessor Systems , 2004, Real-Time Systems.

[25]  Fang Liu,et al.  Understanding how off-chip memory bandwidth partitioning in Chip Multiprocessors affects system performance , 2010, HPCA - 16 2010 The Sixteenth International Symposium on High-Performance Computer Architecture.

[26]  Francisco J. Cazorla,et al.  Optimal task assignment in multithreaded processors: a statistical approach , 2012, ASPLOS XVII.

[27]  Giorgio C. Buttazzo,et al.  Memory-processor co-scheduling in fixed priority systems , 2015, RTNS.

[28]  Srinivas Devadas,et al.  Dynamic Cache Partitioning via Columnization , 2000, DAC 2000.

[29]  Sanjoy K. Baruah,et al.  Optimal online multiprocessor scheduling of sporadic real-time tasks is impossible , 2010, Real-Time Systems.

[30]  Wang Yi,et al.  New Schedulability Test Conditions for Non-preemptive Scheduling on Multiprocessor Platforms , 2008, 2008 Real-Time Systems Symposium.

[31]  Lothar Thiele,et al.  Worst case delay analysis for memory interference in multicore systems , 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

[32]  David Broman,et al.  WCET-aware dynamic code management on scratchpads for Software-Managed Multicores , 2014, 2014 IEEE 19th Real-Time and Embedded Technology and Applications Symposium (RTAS).

[33]  Marco Caccamo,et al.  Light-PREM: Automated software refactoring for predictable execution on COTS embedded systems , 2014, 2014 IEEE 20th International Conference on Embedded and Real-Time Computing Systems and Applications.

[34]  Hennadiy Leontyev,et al.  A Unified Hard/Soft Real-Time Schedulability Test for Global EDF Multiprocessor Scheduling , 2008, 2008 Real-Time Systems Symposium.

[35]  Marco Caccamo,et al.  Schedulability Analysis for Memory Bandwidth Regulated Multicore Real-Time Systems , 2016, IEEE Transactions on Computers.

[36]  Kees Goossens,et al.  AEthereal network on chip: concepts, architectures, and implementations , 2005, IEEE Design & Test of Computers.

[37]  Rodolfo Pellizzoni,et al.  Worst Case Analysis of DRAM Latency in Multi-requestor Systems , 2013, 2013 IEEE 34th Real-Time Systems Symposium.

[38]  Ana Sokolova,et al.  A Compacting Real-Time Memory Management System , 2008, USENIX Annual Technical Conference.

[39]  Sanjoy K. Baruah,et al.  The Non-preemptive Scheduling of Periodic Tasks upon Multiprocessors , 2006, Real-Time Systems.

[40]  Rajeev Barua,et al.  Dynamic allocation for scratch-pad memory using compile-time decisions , 2006, TECS.

[41]  Francisco J. Cazorla,et al.  Hardware support for WCET analysis of hard real-time multicore systems , 2009, ISCA '09.

[42]  Hiren D. Patel,et al.  A framework for scheduling DRAM memory accesses for multi-core mixed-time critical systems , 2015, 21st IEEE Real-Time and Embedded Technology and Applications Symposium.

[43]  Lui Sha,et al.  Real-Time Control of I/O COTS Peripherals for Embedded Systems , 2009, 2009 30th IEEE Real-Time Systems Symposium.

[44]  Sanjoy K. Baruah Techniques for Multiprocessor Global Schedulability Analysis , 2007, 28th IEEE International Real-Time Systems Symposium (RTSS 2007).

[45]  Alan Burns,et al.  Improved priority assignment for global fixed priority pre-emptive scheduling in multiprocessor real-time systems , 2010, Real-Time Systems.

[46]  Wei Zhang,et al.  WCET Analysis for Multi-Core Processors with Shared L2 Instruction Caches , 2008, 2008 IEEE Real-Time and Embedded Technology and Applications Symposium.

[47]  C. Gill,et al.  Analysis of Global EDF for Parallel Tasks , 2013 .

[48]  James E. Smith,et al.  Fair Queuing Memory Systems , 2006, 2006 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'06).

[49]  Sebastian Stiller,et al.  Feasibility Analysis in the Sporadic DAG Task Model , 2013, 2013 25th Euromicro Conference on Real-Time Systems.

[50]  Joseph Musmanno Data Intensive Systems (DIS) Benchmark Performance Summary , 2003 .

[51]  Francisco J. Cazorla,et al.  Using Randomized Caches in Probabilistic Real-Time Systems , 2009, 2009 21st Euromicro Conference on Real-Time Systems.

[52]  Alexandra Fedorova,et al.  Addressing shared resource contention in multicore processors via scheduling , 2010, ASPLOS XV.

[53]  Marco Caccamo,et al.  A Predictable Execution Model for COTS-Based Embedded Systems , 2011, 2011 17th IEEE Real-Time and Embedded Technology and Applications Symposium.

[54]  K Lakshmanan,et al.  Scheduling Parallel Real-Time Tasks on Multi-core Processors , 2010, 2010 31st IEEE Real-Time Systems Symposium.

[55]  Petru Eles,et al.  Bus Access Optimization for Predictable Implementation of Real-Time Applications on Multiprocessor Systems-on-Chip , 2007, RTSS.

[56]  Heiko Falk,et al.  Optimal static WCET-aware scratchpad allocation of program code , 2009, 2009 46th ACM/IEEE Design Automation Conference.

[57]  Kees G. W. Goossens,et al.  A reconfigurable real-time SDRAM controller for mixed time-criticality systems , 2013, 2013 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS).

[58]  Rodolfo Pellizzoni,et al.  Schedulability analysis of global memory-predictable scheduling , 2014, 2014 International Conference on Embedded Software (EMSOFT).

[59]  Frank Mueller,et al.  Push-assisted migration of real-time tasks in multi-core processors , 2009, LCTES '09.

[60]  David A. Patterson,et al.  Computer Architecture: A Quantitative Approach , 1969 .

[61]  Marko Bertogna,et al.  Response-Time Analysis of Synchronous Parallel Tasks in Multiprocessor Systems , 2014, RTNS.

[62]  Chung Laung Liu,et al.  Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment , 1989, JACM.

[63]  Rodolfo Pellizzoni,et al.  Time-predictable execution of multithreaded applications on multicore systems , 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[64]  Rajeev Barua,et al.  Heap data allocation to scratch-pad memory in embedded systems , 2005, J. Embed. Comput..

[65]  Luca Benini,et al.  An OpenMP Compiler for Efficient Use of Distributed Scratchpad Memory in MPSoCs , 2012, IEEE Transactions on Computers.

[66]  Kees G. W. Goossens,et al.  Predator: A predictable SDRAM memory controller , 2007, 2007 5th IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS).

[67]  Marco Caccamo,et al.  Memory-Aware Scheduling of Multicore Task Sets for Real-Time Systems , 2012, 2012 IEEE International Conference on Embedded and Real-Time Computing Systems and Applications.

[68]  H. Peter Hofstee,et al.  Introduction to the Cell multiprocessor , 2005, IBM J. Res. Dev..

[69]  Geoffrey Nelissen,et al.  Techniques Optimizing the Number of Processors to Schedule Multi-threaded Tasks , 2012, 2012 24th Euromicro Conference on Real-Time Systems.

[70]  Marco Caccamo,et al.  A Memory Access Detection Methodology for Accurate Workload Characterization , 2015, 2015 IEEE 21st International Conference on Embedded and Real-Time Computing Systems and Applications.

[71]  Lui Sha,et al.  Optimizing Tunable WCET with Shared Resource Allocation and Arbitration in Hard Real-Time Multicore Systems , 2011, 2011 IEEE 32nd Real-Time Systems Symposium.

[72]  Daniel Gracia Pérez,et al.  Predictable Flight Management System Implementation on a Multicore Processor , 2014 .

[73]  Alan Burns,et al.  Global fixed priority scheduling with deferred pre-emption , 2013, 2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications.

[74]  Jinkyu Lee,et al.  Global EDF Schedulability Analysis for Synchronous Parallel Tasks on Multicore Platforms , 2013, 2013 25th Euromicro Conference on Real-Time Systems.

[75]  Paul Caspi,et al.  From Control Loops to Real-Time Programs , 2005, Handbook of Networked and Embedded Control Systems.

[76]  Sanjoy K. Baruah The federated scheduling of constrained-deadline sporadic DAG task systems , 2015, 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[77]  Frank Mueller,et al.  Source-Code-Correlated Cache Coherence Characterization of OpenMP Benchmarks , 2007, IEEE Transactions on Parallel and Distributed Systems.

[78]  David Broman,et al.  FlexPRET: A processor platform for mixed-criticality systems , 2014, 2014 IEEE 19th Real-Time and Embedded Technology and Applications Symposium (RTAS).

[79]  Theodore P. Baker,et al.  Multiprocessor EDF and deadline monotonic schedulability analysis , 2003, RTSS 2003. 24th IEEE Real-Time Systems Symposium, 2003.

[80]  Jean-François Deverge,et al.  WCET-Directed Dynamic Scratchpad Memory Allocation of Data , 2007, 19th Euromicro Conference on Real-Time Systems (ECRTS'07).

[81]  Rodolfo Pellizzoni,et al.  A Survey on Cache Management Mechanisms for Real-Time Embedded Systems , 2015, ACM Comput. Surv..

[82]  Kai Li,et al.  The PARSEC benchmark suite: Characterization and architectural implications , 2008, 2008 International Conference on Parallel Architectures and Compilation Techniques (PACT).

[83]  Björn Andersson,et al.  Response Time Analysis of COTS-Based Multicores Considering the Contention on the Shared Memory Bus , 2011, 2011IEEE 10th International Conference on Trust, Security and Privacy in Computing and Communications.

[84]  Ishfaq Ahmad,et al.  Analysis, evaluation, and comparison of algorithms for scheduling task graphs on parallel processors , 1996, Proceedings Second International Symposium on Parallel Architectures, Algorithms, and Networks (I-SPAN'96).

[85]  Liliana Cucu-Grosjean,et al.  Analysis of Probabilistic Cache Related Pre-emption Delays , 2013, 2013 25th Euromicro Conference on Real-Time Systems.

[86]  Francisco J. Cazorla,et al.  Time-analysable non-partitioned shared caches for real-time multicore systems , 2014, 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC).

[87]  Michael Frumkin,et al.  The OpenMP Implementation of NAS Parallel Benchmarks and its Performance , 2013 .

[88]  Chenyang Lu,et al.  Analysis of Federated and Global Scheduling for Parallel Real-Time Tasks , 2014, 2014 26th Euromicro Conference on Real-Time Systems.

[89]  Robert I. Davis,et al.  Limited Pre-emptive Global Fixed Task Priority , 2013, 2013 IEEE 34th Real-Time Systems Symposium.

[90]  Lui Sha,et al.  MemGuard: Memory bandwidth reservation system for efficient performance isolation in multi-core platforms , 2013, 2013 IEEE 19th Real-Time and Embedded Technology and Applications Symposium (RTAS).

[91]  Aviral Shrivastava,et al.  SSDM: Smart Stack Data Management for software managed multicores (SMMs) , 2013, 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC).

[92]  Giorgio C. Buttazzo,et al.  Response-Time Analysis of Conditional DAG Tasks in Multiprocessor Systems , 2015, 2015 27th Euromicro Conference on Real-Time Systems.

[93]  Lars Lundberg,et al.  Multiprocessor scheduling of age constraint processes , 1998, Proceedings Fifth International Conference on Real-Time Computing Systems and Applications (Cat. No.98EX236).

[94]  Aamer Jaleel,et al.  Analyzing Parallel Programs with PIN , 2010, Computer.

[95]  Paolo Valente,et al.  A memory-centric approach to enable timing-predictability within embedded many-core accelerators , 2015, 2015 CSI Symposium on Real-Time and Embedded Systems and Technologies (RTEST).

[96]  Kees G. W. Goossens,et al.  Real-Time Scheduling Using Credit-Controlled Static-Priority Arbitration , 2008, 2008 14th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications.

[97]  Leonel Sousa,et al.  Experimental Evaluation of Task Scheduling Accuracy: Implications for the Scheduling Model , 2003 .

[98]  Leonel Sousa,et al.  Communication contention in task scheduling , 2005, IEEE Transactions on Parallel and Distributed Systems.

[99]  Neil C. Audsley,et al.  Explicit Reservation of Local Memory in a Predictable, Preemptive Multitasking Real-Time System , 2012, IEEE Real-Time and Embedded Technology and Applications Symposium.

[100]  A. Kurdila,et al.  Vision-based control of micro-air-vehicles: progress and problems in estimation , 2004, 2004 43rd IEEE Conference on Decision and Control (CDC) (IEEE Cat. No.04CH37601).

[101]  Marco Caccamo,et al.  Real-time cache management framework for multi-core architectures , 2013, 2013 IEEE 19th Real-Time and Embedded Technology and Applications Symposium (RTAS).

[102]  Yves Robert,et al.  Scheduling and Automatic Parallelization , 2000, Birkhäuser Boston.

[103]  Björn Andersson,et al.  Bounding memory interference delay in COTS-based multi-core systems , 2014, 2014 IEEE 19th Real-Time and Embedded Technology and Applications Symposium (RTAS).

[104]  Rodolfo Pellizzoni,et al.  A Dynamic Scratchpad Memory Unit for Predictable Real-Time Embedded Systems , 2013, 2013 25th Euromicro Conference on Real-Time Systems.

[105]  Giuseppe Lipari,et al.  Improved schedulability analysis of EDF on multiprocessor platforms , 2005, 17th Euromicro Conference on Real-Time Systems (ECRTS'05).

[106]  Rodolfo Pellizzoni,et al.  Trading Cores for Memory Bandwidth in Real-Time Systems , 2016, 2016 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS).

[107]  Isabelle Puaut,et al.  Scratchpad memories vs locked caches in hard real-time systems: a quantitative comparison , 2007 .

[108]  Damien Hardy,et al.  Using Bypass to Tighten WCET Estimates for Multi-Core Processors with Shared Instruction Caches , 2009, 2009 30th IEEE Real-Time Systems Symposium.

[109]  Kees G. W. Goossens,et al.  An efficient on-chip NI offering guaranteed services, shared-memory abstraction, and flexible network configuration , 2005, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[110]  Jan Reineke,et al.  Memory Hierarchies, Pipelines, and Buses for Future Architectures in Time-Critical Embedded Systems , 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[111]  Marco Caccamo,et al.  Memory-centric scheduling for multicore hard real-time systems , 2012, Real-Time Systems.

[112]  Liliana Cucu-Grosjean,et al.  PROARTIS: Probabilistically Analyzable Real-Time Systems , 2013, TECS.

[113]  Tulika Mitra,et al.  Exploring locking & partitioning for predictable shared caches on multi-cores , 2008, 2008 45th ACM/IEEE Design Automation Conference.

[114]  Sascha Uhrig,et al.  A real‐time capable coherent data cache for multicores , 2014, Concurr. Comput. Pract. Exp..

[115]  Sanjoy K. Baruah,et al.  A Generalized Parallel Task Model for Recurrent Real-time Processes , 2012, 2012 IEEE 33rd Real-Time Systems Symposium.

[116]  Tulika Mitra,et al.  Modeling shared cache and bus in multi-cores for timing analysis , 2010, SCOPES.

[117]  Rodolfo Pellizzoni,et al.  Parallelism-Aware Memory Interference Delay Analysis for COTS Multicore Systems , 2014, 2015 27th Euromicro Conference on Real-Time Systems.

[118]  Marco Caccamo,et al.  Global Real-Time Memory-Centric Scheduling for Multicore Systems , 2016, IEEE Transactions on Computers.

[119]  Thomas M. Conte,et al.  A Benchmark Characterization of the EEMBC Benchmark Suite , 2009, IEEE Micro.

[120]  O. Mutlu,et al.  Fairness via source throttling: a configurable and high-performance fairness substrate for multi-core memory systems , 2010, ASPLOS XV.

[121]  Björn B. Brandenburg,et al.  Cache-Related Preemption and Migration Delays : Empirical Approximation and Impact on Schedulability ∗ , 2010 .

[122]  Sanjoy K. Baruah,et al.  Multiprocessor Scheduling for Real-Time Systems , 2015, Embedded Systems.

[123]  Robert I. Davis,et al.  Quantifying the Exact Sub-optimality of Non-preemptive Scheduling , 2015, 2015 IEEE Real-Time Systems Symposium.

[124]  Joël Goossens,et al.  Gang FTP scheduling of periodic and parallel rigid real-time tasks , 2010, ArXiv.

[125]  Doug Lea,et al.  A Java fork/join framework , 2000, JAVA '00.

[127]  Vincent Nélis,et al.  A framework for memory contention analysis in multi-core platforms , 2015, Real-Time Systems.

[128]  Shinpei Kato,et al.  Gang EDF Scheduling of Parallel Task Systems , 2009, 2009 30th IEEE Real-Time Systems Symposium.

[129]  Rolf Ernst,et al.  Bounding the shared resource load for the performance analysis of multiprocessor systems , 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

[130]  Edward A. Lee,et al.  PRET DRAM controller: Bank privatization for predictability and temporal isolation , 2011, 2011 Proceedings of the Ninth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS).

[131]  Francisco J. Cazorla,et al.  Multi-level Unified Caches for Probabilistically Time Analysable Real-Time Systems , 2013, 2013 IEEE 34th Real-Time Systems Symposium.

[132]  Aviral Shrivastava,et al.  CMSM: An efficient and effective Code Management for Software Managed Multicores , 2013, 2013 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS).

[133]  James H. Anderson,et al.  Outstanding Paper Award: Making Shared Caches More Predictable on Multicore Platforms , 2013, 2013 25th Euromicro Conference on Real-Time Systems.

[134]  Jakob Engblom,et al.  The worst-case execution-time problem—overview of methods and survey of tools , 2008, TECS.

[136]  Giorgio C. Buttazzo,et al.  Measuring the Performance of Schedulability Tests , 2005, Real-Time Systems.

[137]  Rolf Ernst,et al.  Response-Time Analysis of Parallel Fork-Join Workloads with Real-Time Constraints , 2013, 2013 25th Euromicro Conference on Real-Time Systems.

[138]  Giorgio C. Buttazzo,et al.  Limited Preemptive Scheduling for Real-Time Systems. A Survey , 2013, IEEE Transactions on Industrial Informatics.

[139]  Bo Peng,et al.  Explicit Preemption Placement for Real-Time Conditional Code , 2014, 2014 26th Euromicro Conference on Real-Time Systems.

[140]  Damien Hardy,et al.  Estimation of Cache Related Migration Delays for Multi-Core Processors with Shared Instruction Caches , 2009 .

[141]  Sudarshan Kumar Dhall,et al.  Scheduling periodic-time - critical jobs on single processor and multiprocessor computing systems. , 1977 .

[142]  Robert I. Davis,et al.  Multiprocessor fixed priority scheduling with limited preemptions , 2015, RTNS.

[143]  Wang Yi,et al.  Building timing predictable embedded systems , 2014, ACM Trans. Embed. Comput. Syst..