Analysis of darlington pair amplifier at 90nm technology
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[1] Darlington's Synthesis and RMS Error Evaluation* , 1960 .
[2] Vijay Nath,et al. A darlington pair transistor based operational amplifier , 2015, 2015 Global Conference on Communication Technologies (GCCT).
[3] Kurt A. Kaczmarek,et al. A High-Voltage Bipolar Transconductance Amplifier for Electrotactile Stimulation , 2008, IEEE Transactions on Biomedical Engineering.
[4] Muhammad H. Rashid. Microelectronic Circuits: Analysis and Design , 1998 .
[5] SachchidaNand Shukla,et al. Two-stage small-signal amplifier with Darlington and Sziklai pairs , 2014, 2014 IEEE International Conference on Semiconductor Electronics (ICSE2014).
[6] Rajesh Mehra,et al. Area and Power Efficient CMOS Adder Design by Hybridizing PTL and GDI Technique , 2013 .
[7] Akhilesh Verma Akhilesh Verma. Design and Analysis of Conventional and Ratioed Cmos Logic Circuit , 2013 .
[8] A. Sharma,et al. Low power TG full adder design using CMOS nano technology , 2012, 2012 2nd IEEE International Conference on Parallel, Distributed and Grid Computing.
[9] M. H. Ali,et al. Analysis of Darlington Pair in Distributed Amplifier Circuit , 2015 .
[10] Hassan Jassim Motlak. Design of Low Voltage, Low Power (IF) Amplifier Based-On MOSFET Darlington Configuration , 2013 .
[11] Tanvi Sood Tanvi Sood. Design a Low Power Half-Subtractor Using .90µm CMOS Technology , 2013 .
[12] D. G. Duff,et al. An analysis of low-frequency second-order distortion in bipolar transistors applied to an amplifier , 1973 .