论文信息 - ParaFPGA 2017: Enlarging the Scope of Parallel Programming with FPGAs

ParaFPGA 2017: Enlarging the Scope of Parallel Programming with FPGAs

The biennial mini-symposium “Parallel computing with FPGAs” brings together research on applications and tools fostering the use of field programmable gate arrays. Key aspects are the efficiency, programmability, scalability and portability of high-level synthesis languages and tools. In particular this year’s contributions present productivity and programmability results of using HLS languages OpenCL, OmpSs, MATLAB/Octave, OpenSPL and Vivado HLS. The current state and future challenges of HLS within the FPGA landscape is covered in a special keynote on bridging the gap between software and hardware designers.

Abdellah Touhafi | Erik H. D'Hollander

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[2] Javier Diaz,et al. Implementation of the K-Means Algorithm on Heterogeneous Devices: A Use Case Based on an Industrial Dataset , 2017, PARCO.

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[4] João M. P. Cardoso,et al. On Coding Techniques for Targeting FPGAs via OpenCL , 2017, PARCO.

[5] Christian Pilato. Bridging the Gap Between Software and Hardware Designers Using High-Level Synthesis , 2017, PARCO.

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[9] Mohammad Hosseinabady,et al. Pipelined Streaming Computation of Histogram in FPGA OpenCL , 2017, PARCO.