Research of multi-FPGA signal processor for underwater 3-D imaging sonar system

A multi-FPGA signal processor is proposed for implementing the signal processing of underwater 3-D imaging sonar systems. The processing element of the system architecture is FPGA, and the beamforming algorithm of 3-D imaging sonar is implemented in the multi-stage parallel distributive steps. The FPGAs are connected using Low Voltage Differential Signaling (LVDS), which is in user defined protocol. Finally, the resources utilizations for the FPGAs are listed. The proposed signal processor has both low communication overhead and low requirement of hardware resource.

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