Temperature-aware dynamic voltage and frequency scaling enabled MPSoC modeling using Stochastic Activity Networks

Abstract The CMOS technology scaling brings new challenges in temperature, reliability, performance and leakage power. Most of the thermal management techniques compromise performance to control thermal behavior of the system by slowing down or turning off processors. In this paper, we use Stochastic Activity Networks (SANs) to model and evaluate the power consumption of a multi-core system with respect to thermal constraints. The Dynamic Voltage and Frequency Scaling (DVFS) technique is used, in our proposed model, for dynamically controlling the temperature of cores. We define multiple thresholds for the temperature of cores and apply the DVFS technique, by assigning lower voltage/frequency to the core with higher temperature. Results obtained from analytically solving the proposed SAN model are compared with the data gathered from experiments on a quad-core system. The accuracy of the proposed model in evaluating power consumption of six CPU-intensive applications is higher than 90% when compared with the experimental data.

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