A Memristor Crossbar Based Computing Engine Optimized for High Speed and Accuracy

Matrix-vector multiplication, as a key computing operation, has been largely adopted in applications and hence greatly affects the execution efficiency. A common technique to enhance the performance of matrix-vector multiplication is increasing execution parallelism, which results in higher design cost. In recent years, new devices and structures have been widely investigated as alternative solutions. Among them, memristor crossbar demonstrates a great potential for its intrinsic support of matrix-vector multiplication, high integration density, and built-in parallel execution. However, the computation accuracy and speed of such designs are limited and constrained by the features of crossbar array and peripheral circuitry. In this work, we propose a new memristor crossbar based computing engine design by leveraging a current sensing scheme. High operation parallelism and therefore fast computation can be achieved by simultaneously supplying analog voltages into a memristor crossbar and directly detecting weighted currents through current amplifiers. The performance and effectiveness of the proposed design were examined through the implementation of a neural network for pattern recognition based on MNIST database. Compared to a prior reported design, ours increases the recognition accuracy 8.1% (to 94.6%).

[1]  Tuo-Hung Hou,et al.  One selector-one resistor (1S1R) crossbar array for high-density flexible memory applications , 2011, 2011 International Electron Devices Meeting.

[2]  Yu Wang,et al.  MErging the Interface: Power, area and accuracy co-optimization for RRAM crossbar-based mixed-signal computing system , 2015, 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC).

[3]  Xiaolong Zhang,et al.  Exploring potentials of perpendicular magnetic anisotropy STT-MRAM for cache design , 2014, 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

[4]  Fabien Clermidy,et al.  Advanced technologies for brain-inspired computing , 2014, 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC).

[5]  Yiran Chen,et al.  Memristor Crossbar-Based Neuromorphic Computing System: A Case Study , 2014, IEEE Transactions on Neural Networks and Learning Systems.

[6]  Heng-Yuan Lee,et al.  A 5ns fast write multi-level non-volatile 1 K bits RRAM memory with advance write scheme , 2009, 2009 Symposium on VLSI Circuits.

[7]  Arindam Banerjee,et al.  Improved matrix multiplier design for high-speed digital signal processing applications , 2014, IET Circuits Devices Syst..

[8]  Hao Jiang,et al.  A spiking neuromorphic design with resistive crossbar , 2015, 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC).

[9]  Qing Wu,et al.  Hardware realization of BSB recall function using memristor crossbar arrays , 2012, DAC Design Automation Conference 2012.

[10]  Chenchen Liu,et al.  A Weighted Sensing Scheme for ReRAM-Based Cross-Point Memory Array , 2014, 2014 IEEE Computer Society Annual Symposium on VLSI.

[11]  Jeyavijayan Rajendran,et al.  Leveraging Memristive Systems in the Construction of Digital Logic Circuits , 2012, Proceedings of the IEEE.

[12]  Jacques-Olivier Klein,et al.  Sneak paths effects in CBRAM memristive devices arrays for spiking neural networks , 2014, 2014 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH).

[13]  T.G. Noll,et al.  Fundamental analysis of resistive nano-crossbars for the use in hybrid Nano/CMOS-memory , 2007, ESSCIRC 2007 - 33rd European Solid-State Circuits Conference.

[14]  Michael Hatzopoulos,et al.  A parallel linear system solver , 1979 .

[15]  Farnood Merrikh-Bayat,et al.  Training and operation of an integrated neuromorphic network based on metal-oxide memristors , 2014, Nature.

[16]  Syed Manzoor Qasim,et al.  FPGA Design and Implementation of Dense Matrix-Vector Multiplication for Image Processing Application , 2010 .

[17]  Shimeng Yu,et al.  Investigating the switching dynamics and multilevel capability of bipolar metal oxide resistive switching memory , 2011 .

[18]  Wei Yang Lu,et al.  Nanoscale memristor device as synapse in neuromorphic systems. , 2010, Nano letters.

[19]  L. Chua Memristor-The missing circuit element , 1971 .

[20]  P. Simon Too Big to Ignore: The Business Case for Big Data , 2013 .

[21]  J Joshua Yang,et al.  Memristive devices for computing. , 2013, Nature nanotechnology.

[22]  D. Stewart,et al.  The missing memristor found , 2008, Nature.

[23]  Yann LeCun,et al.  The mnist database of handwritten digits , 2005 .

[24]  Kaushik Roy,et al.  Ultra low power associative computing with spin neurons and resistive crossbar memory , 2013, 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC).

[25]  Narayan Srinivasa,et al.  A functional hybrid memristor crossbar-array/CMOS system for data storage and neuromorphic applications. , 2012, Nano letters.

[26]  Constantinos E. Goutis,et al.  A methodology for speeding up matrix vector multiplication for single/multi-core architectures , 2015, The Journal of Supercomputing.

[27]  Ka Nang Leung,et al.  An integrated CMOS current-sensing circuit for low-Voltage current-mode buck regulator , 2005, IEEE Transactions on Circuits and Systems II: Express Briefs.