Efficient CODEC Designs for Crosstalk Avoidance Codes Based on Numeral Systems

Low-complexity CODECs for two classes of crosstalk avoidance codes (CACs), forbidden pattern codes (FPCs) and forbidden transition codes (FTCs), have been recently proposed based on Fibonacci-based binary numeral system. In this paper, we first generalize this idea and establish a generic framework for the CODEC design of all classes of CACs based on binary mixed-radix numeral systems. Using this framework, we then propose novel CODEC designs for three important classes of CACs, one lambda codes (OLCs), FPCs, and forbidden overlapping codes (FOCs). Our CODEC designs have area complexity and delay that increase quadratically with the size of the bus, while achieving optimal or nearly optimal code rates. Our CODECs also have simple and regular circuitry, and can easily achieve very high throughput by pipelining. Our efficient CODECs, used with such techniques as partial coding, help to make CACs a practical option in combating crosstalk delay, which is a bottleneck in deep submicrometer system-on-chip designs.

[1]  Naresh R. Shanbhag,et al.  Area and energy-efficient crosstalk avoidance codes for on-chip buses , 2004, IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings..

[2]  Hiroto Yasuura,et al.  A bus delay reduction technique considering crosstalk , 2000, DATE '00.

[3]  Paul-Peter Sotiriadis,et al.  Interconnect modeling and optimization in deep sub-micron technologies , 2002 .

[4]  Kurt Keutzer,et al.  Bus encoding to prevent crosstalk delay , 2001, IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281).

[5]  Chunjie Duan,et al.  Exploiting crosstalk to speed up on-chip buses , 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

[6]  Chunjie Duan,et al.  Forbidden transition free crosstalk avoidance CODEC design , 2008, 2008 45th ACM/IEEE Design Automation Conference.

[7]  Chunjie Duan,et al.  Analysis and avoidance of cross-talk in on-chip buses , 2001, HOT 9 Interconnects. Symposium on High Performance Interconnects.

[8]  M.A. Elgamel,et al.  Interconnect noise analysis and optimization in deep submicron technology , 2003, IEEE Circuits and Systems Magazine.

[9]  Donald Ervin Knuth,et al.  The Art of Computer Programming , 1968 .

[10]  Srinivasa Raghavan Sridhara Communication-Inspired Design of on -Chip Buses , 2006 .

[11]  Chunjie Duan,et al.  Efficient On-Chip Crosstalk Avoidance CODEC Design , 2009, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[12]  Naresh R. Shanbhag,et al.  Coding for reliable on-chip buses: a class of fundamental bounds and practical codes , 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.