论文信息 - A stability-improved single-opamp third-order ΣΔ modulator by using a fully-passive noise-shaping SAR ADC and passive adder

A stability-improved single-opamp third-order ΣΔ modulator by using a fully-passive noise-shaping SAR ADC and passive adder

A stability-improved single operational amplifier third-order ΣΔ modulator by using a fully-passive noise shaping SAR ADC as a quantizer is presented in this paper. One operational amplifier is shared to realize 2nd order noise shaping and an additional 1st order noise shaping is realized by a fully-passive technique in the quantizer. An additional switch and capacitor path is introduced to the operational amplifier in order to solve a potential instability issue during non-overlapped clock time slot. Meanwhile, a passive adder is used to realize an analog addition in front of the quantizer. Designed in a 65-nm 1P9M CMOS technology, the modulator gives a 75-dB SNDR with a signal bandwidth of 100 kHz and a sampling clock of 3.2 MHz. The prototype dissipates 45.8 μW with a FoM of 50 fJ/conv.-step when analog supply is 0.7 V and digital supply is 0.85 V.

Akira Matsuzawa | Zhijie Chen | Masaya Miyahara

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