Dominator homomorphism based code matching for source-level simulation of embedded software

Relating optimized binary code and the source-level statements from which it was created can be challenging if an optimizing compiler was used to create the machine code. Moreover, this relation is crucial if a compiler-optimized program must be debugged or results from a low-level analysis need to be mapped to the source code to perform manual optimizations. Existing approaches for the debugging of optimized code usually require pervasive changes in the compiler and hence are not available for all architectures. Methods for analyzing non-functional properties of software components in complex systems (i.e. execution time and power consumption) often have similar constraints, if compiler optimizations are supported at all. This paper proposes two novel concepts to overcome these issues. To precisely relate source-level statements with the respective compiler-generated machine code, a method to reconstruct and disambiguate debug information is presented. Based on this information, an instrumentation technique is introduced which allows accurately simulating the execution of optimized binary code at the source code level. Experimental results show that by using this technique, arbitrary low-level properties of software components can be evaluated in a fast and accurate manner without running the software on the actual target hardware.

[1]  Wolfgang Rosenstiel,et al.  Reconstructing Line References from Optimized Binary Code for Source-Level Annotation , 2010, FDL.

[2]  Zhonglei Wang,et al.  An efficient approach for system-level timing simulation of compiler-optimized embedded software , 2009, 2009 46th ACM/IEEE Design Automation Conference.

[3]  Guillem Bernat,et al.  Hybrid measurement-based WCET analysis at the source level using object-level traces , 2010, WCET.

[4]  Eugenio Villar,et al.  Fast instruction cache modeling for approximate timed HW/SW co-simulation , 2010, GLSVLSI '10.

[5]  Alfred V. Aho,et al.  Compilers: Principles, Techniques, and Tools (2nd Edition) , 2006 .

[6]  Alfred V. Aho,et al.  Compilers: Principles, Techniques, and Tools , 1986, Addison-Wesley series in computer science / World student series edition.

[7]  Paul Lokuciejewski,et al.  A compiler framework for the reduction of worst-case execution times , 2010, Real-Time Systems.

[8]  Wolfgang Rosenstiel,et al.  Fast and accurate source-level simulation of software timing considering complex code optimizations , 2011, 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC).

[9]  Eric Cheung,et al.  Fast and accurate performance simulation of embedded software for MPSoC , 2009, 2009 Asia and South Pacific Design Automation Conference.

[10]  Wolfgang Rosenstiel,et al.  High-performance timing simulation of embedded software , 2008, 2008 45th ACM/IEEE Design Automation Conference.

[11]  Alberto L. Sangiovanni-Vincentelli,et al.  Source-Level Timing Annotation and Simulation for a Heterogeneous Multiprocessor , 2008, 2008 Design, Automation and Test in Europe.

[12]  Rajiv Gupta,et al.  FULLDOC: A Full Reporting Debugger for Optimized Code , 2000, SAS.

[13]  Ren-Song Tsay,et al.  Source-level timing annotation for fast and accurate TLM computation model generation , 2010, 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC).

[14]  Paul Lokuciejewski,et al.  A Retargetable Framework for Multi-objective WCET-aware H igh-level Compiler Optimizations , 2008 .

[15]  Kun Lu,et al.  An approach to improve accuracy of source-level TLMs of embedded software , 2011, 2011 Design, Automation & Test in Europe.

[16]  Jean-Claude Fernandez,et al.  A fully-non-transparent approach to the code location problem , 2008, SCOPES '08.

[17]  Caroline Tice,et al.  Key Instructions: Solving the Code Location Problem for Optimized Code , 2000 .

[18]  Xavier Rival,et al.  Symbolic transfer function-based approaches to certified compilation , 2004, POPL.

[19]  Frédéric Pétrot,et al.  Automatic instrumentation of embedded software for high level hardware/software co-simulation , 2009, 2009 Asia and South Pacific Design Automation Conference.