Reliability tests for system-on-chip design

System-on-chip (SoC) has created a new set of design challenges. The higher integration capacity of SoC reduces the number of components in the system and trims the size and routing complexity of the printed circuit board. Reliability tests for such systems were described. With ever shrinking geometries and higher density circuits, the issue of errors and reliability in complex SoC design is set to become an increasingly challenging issue for the industry as a whole.