Modelling the degradation in the subthreshold characteristics of submicrometre LDD PMOSFETs under hot-carrier stressing

Hot-carrier injection is observed increasingly to degrade the subthreshold characteristics with the scaling of LDD PMOSFETs. A physical subthreshold current model is applied to the fresh and hot-carrier-stressed submicrometre channel length devices. The channel length reduction is subsequently extracted. An empirical relationship is developed to characterize the degradation parameters as a function of stress time and channel length. With the use of this relationship, we can determine the device lifetime or predict the minimum allowable channel length (for a certain percentage of degradation and lifetime) that is applicable for a specific technology. The degradation of the PMOSFET subthreshold current, which imposes a major limit on device reliability for deep-submicron technology and low-power applications, is fully described by a physical analytical model.

[1]  J. Whitfield A modification on "An improved method to determine MOSFET channel length" , 1985, IEEE Electron Device Letters.

[2]  Bing J. Sheu,et al.  BSIM: Berkeley short-channel IGFET model for MOS transistors , 1987 .

[3]  M. Koyanagi,et al.  Hot-electron-induced punchthrough (HEIP) effect in submicrometer PMOSFET's , 1987, IEEE Transactions on Electron Devices.

[4]  G. Groeseneken,et al.  Analysis of the charge pumping technique and its application for the evaluation of MOSFET degradation , 1989 .

[5]  Ping-Keung Ko,et al.  Hot-carrier current modeling and device degradation in surface-channel p-MOSFETs , 1990 .

[6]  Werner Weber,et al.  A physical lifetime prediction method for hot-carrier-stressed p-MOS transistors , 1991, International Electron Devices Meeting 1991 [Technical Digest].

[7]  Q. Wang,et al.  Explanation and model for the logarithmic time dependence of p-MOSFET degradation , 1991, IEEE Electron Device Letters.

[8]  A. Hamada,et al.  Time dependence of p-MOSFET hot-carrier degradation measured and interpreted consistently over ten orders of magnitude , 1993 .

[9]  Q. Wang,et al.  A model for the time- and bias-dependence of p-MOSFET degradation , 1994 .

[10]  Hao Fang,et al.  Hot-carrier-induced off-state current leakage in submicrometer PMOSFET devices , 1994, IEEE Electron Device Letters.

[11]  Y. Pan,et al.  A physical-based analytical model for hot-carrier induced saturation current degradation of p-MOSFET's , 1994 .

[12]  J. Kavalieros,et al.  Direct-current measurements of oxide and interface traps on oxidized silicon , 1995 .

[13]  T. Nishida,et al.  Sequential substrate and channel hot electron injection to separate oxide and interface traps in n-MOSTs , 1995 .

[14]  H. Lifka,et al.  Three hot-carrier degradation mechanisms in deep-submicron PMOSFET's , 1995 .