The Alewife CMMU: Addressing the Multiprocessor Communications Gap

Company X has just expended 50 engineers over the last three years to produce their latest microprocessor. Now what? Well, popular wisdom suggests that they should connect a \bunch" of the micros together with some generic network to form a multiprocessor. This will yield \truly impressive performance" which the marketing department can quantify by multiplying the number of processors per box by the stellar MIPS-rating of the new microprocessor. Right?

[1]  Anant Agarwal,et al.  Anatomy of a Message in the Alewife Multiprocessor , 1993, The 8th IEEE Workshop on Computer Communications.

[2]  Anant Agarwal,et al.  LimitLESS directories: A scalable cache coherence scheme , 1991, ASPLOS IV.