On Improving the Security of Logic Locking
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Ramesh Karri | Ozgur Sinanoglu | Muhammad Yasin | Jeyavijayan J. V. Rajendran | J. Rajendran | O. Sinanoglu | R. Karri | Muhammad Yasin | Jeyavijayan Rajendran
[1] Sumit Gulwani,et al. Oracle-guided component-based program synthesis , 2010, 2010 ACM/IEEE 32nd International Conference on Software Engineering.
[2] Frank Sehnke,et al. On the Foundations of Physical Unclonable Functions , 2009, IACR Cryptol. ePrint Arch..
[3] Jeyavijayan Rajendran,et al. Security analysis of logic obfuscation , 2012, DAC Design Automation Conference 2012.
[4] Swarup Bhunia,et al. Security against hardware Trojan through a novel application of design obfuscation , 2009, 2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers.
[5] Paul D. Franzon,et al. FreePDK: An Open-Source Variation-Aware Design Kit , 2007, 2007 IEEE International Conference on Microelectronic Systems Education (MSE'07).
[6] Jeyavijayan Rajendran,et al. Activation of logic encrypted chips: Pre-test or post-test? , 2016, 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE).
[7] R. Pappu,et al. Physical One-Way Functions , 2002, Science.
[8] Joseph Zambreno,et al. Preventing IC Piracy Using Reconfigurable Logic Barriers , 2010, IEEE Design & Test of Computers.
[9] Lilian Bossuet,et al. Survey of hardware protection of design data for integrated circuits and intellectual properties , 2014, IET Comput. Digit. Tech..
[10] Stephen A. Benton,et al. Physical one-way functions , 2001 .
[11] Giorgio Di Natale,et al. A novel hardware logic encryption technique for thwarting illegal overproduction and Hardware Trojans , 2014, 2014 IEEE 20th International On-Line Testing Symposium (IOLTS).
[12] John P. Hayes,et al. Unveiling the ISCAS-85 Benchmarks: A Case Study in Reverse Engineering , 1999, IEEE Des. Test Comput..
[13] Igor L. Markov,et al. Solving the Third-Shift Problem in IC Piracy With Test-Aware Logic Locking , 2015, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[14] Miodrag Potkonjak,et al. Watermarking techniques for intellectual property protection , 1998, Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175).
[15] Miodrag Potkonjak,et al. Effective iterative techniques for fingerprinting design IP [VLSI CAD] , 1999, Proceedings 1999 Design Automation Conference (Cat. No. 99CH36361).
[16] Sayak Ray,et al. Evaluating the security of logic encryption algorithms , 2015, 2015 IEEE International Symposium on Hardware Oriented Security and Trust (HOST).
[17] Ieee Circuits,et al. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems information for authors , 2018, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[18] Jeyavijayan Rajendran,et al. VLSI testing based security metric for IC camouflaging , 2013, 2013 IEEE International Test Conference (ITC).
[19] Vishwani D. Agrawal,et al. Essentials of electronic testing for digital, memory, and mixed-signal VLSI circuits [Book Review] , 2000, IEEE Circuits and Devices Magazine.
[20] Jeyavijayan Rajendran,et al. Logic encryption: A fault analysis perspective , 2012, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE).
[21] Ramesh Karri,et al. A Primer on Hardware Security: Models, Methods, and Metrics , 2014, Proceedings of the IEEE.
[22] Mark Mohammad Tehranipoor,et al. Trustworthy Hardware: Identifying and Classifying Hardware Trojans , 2010, Computer.
[23] Mark Mohammad Tehranipoor,et al. Secure Split-Test for preventing IC piracy by untrusted foundry and assembly , 2013, 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS).
[24] Miodrag Potkonjak,et al. Effective iterative techniques for fingerprinting design IP , 1999, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[25] Armin Biere. Lingeling, Plingeling and Treengeling Entering the SAT Competition 2013 , 2013 .
[26] Kurt Keutzer,et al. OCCOM: efficient computation of observability-based code coverage metrics for functional verification , 1998, Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175).
[27] Nur A. Touba,et al. Improving logic obfuscation via logic cone analysis , 2015, 2015 16th Latin-American Test Symposium (LATS).
[28] Mark Davison,et al. The WTO Agreement on Trade-Related Aspects of Intellectual Property Rights: A Commentary , 2014 .
[29] Swarup Bhunia,et al. HARPOON: An Obfuscation-Based SoC Design Methodology for Hardware Protection , 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[30] Jarrod A. Roy,et al. EPIC: Ending Piracy of Integrated Circuits , 2008, 2008 Design, Automation and Test in Europe.
[31] Jarrod A. Roy,et al. Ending Piracy of Integrated Circuits , 2010, Computer.
[32] Oded Goldreich. Foundations of Cryptography: Index , 2001 .
[33] Oded Goldreich,et al. Foundations of Cryptography: Volume 1, Basic Tools , 2001 .
[34] Jeyavijayan Rajendran,et al. Fault Analysis-Based Logic Encryption , 2015, IEEE Transactions on Computers.
[35] Farinaz Koushanfar,et al. Integrated circuits metering for piracy protection and digital rights management: an overview , 2011, GLSVLSI '11.
[36] Oded Goldreich,et al. Foundations of Cryptography: List of Figures , 2001 .
[37] Mark Mohammad Tehranipoor,et al. Counterfeit Integrated Circuits: Detection, Avoidance, and the Challenges Ahead , 2014, J. Electron. Test..