A data driven CGRA Overlay Architecture with embedded processors

Implementing an algorithm on FPGA is intrinsically more difficult than programming a processor or a GPU. Processor-based implementations “only” require a program to control their pre-synthesized data path, while an FPGA requires that a designer creates a new data path and a new controller for each application. Several approaches have been proposed recently to ease FPGA design. The present work builds on Coarse-Grained Reconfigurable Architectures (CGRAs), and Overlay Architectures (OAs), that allow a designer to take advantage of a pre-compiled FPGA architecture and still provide a way to configure the system at a higher level. In the proposed architecture, a generic data-driven compute fabric is interfaced to standard processors. To validate the proposed architecture and design method, an illustrative example is developed in which a processor sends an RGB image to a processing fabric, where it is converted to Y, Cr, Cb. Results show that thanks to a DMA between the memory and the fabric, a speedup of 50 is reached compared to a pure software implementation running on a Microblaze processor.

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