SRAM embedded memory with low cost, flash EEPROM-switch-controlled redundancy
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R.J. McPartland | D.J. Loeper | F.P. Higgins | R. Singh | G. MacDonald | G. Komoriya | S. Aymeloglu | M.V. DePaolis | C.W. Leung
[1] K. Ohsaki,et al. A single poly EEPROM cell structure for use in standard CMOS processes , 1994 .