Electronic System-Level Synthesis Methodologies

With ever-increasing system complexities, all major semiconductor roadmaps have identified the need for moving to higher levels of abstraction in order to increase productivity in electronic system design. Most recently, many approaches and tools that claim to realize and support a design process at the so-called electronic system level (ESL) have emerged. However, faced with the vast complexity challenges, in most cases at best, only partial solutions are available. In this paper, we develop and propose a novel classification for ESL synthesis tools, and we will present six different academic approaches in this context. Based on these observations, we can identify such common principles and needs as they are leading toward and are ultimately required for a true ESL synthesis solution, covering the whole design process from specification to implementation for complete systems across hardware and software boundaries.

[1]  Soonhoi Ha,et al.  PeaCE: A hardware-software codesign environment for multimedia embedded systems , 2008, TODE.

[2]  Todor Stefanov,et al.  pn: A Tool for Improved Derivation of Process Networks , 2007, EURASIP J. Embed. Syst..

[3]  Gilles Kahn,et al.  The Semantics of a Simple Language for Parallel Programming , 1974, IFIP Congress.

[4]  Gajski,et al.  Guest Editors' Introduction: New VLSI Tools , 1983, Computer.

[5]  Christian Haubelt,et al.  SystemCoDesigner—an automatic ESL synthesis approach by design space exploration and behavioral synthesis for streaming applications , 2009, TODE.

[6]  Timo Hämäläinen,et al.  UML-based multiprocessor SoC design framework , 2006, TECS.

[7]  Jianwen Zhu,et al.  Specification and Design of Embedded Systems , 1998, Informationstechnik Tech. Inform..

[8]  Thorsten Grotker,et al.  System Design with SystemC , 2002 .

[9]  Jrgen Teich Embedded System Synthesis and Optimization , 2000 .

[10]  Ahmed Amine Jerraya,et al.  Multiprocessor System-on-Chip (MPSoC) Technology , 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[11]  Grant Martin,et al.  Overview of the MPSoC design challenge , 2006, 2006 43rd ACM/IEEE Design Automation Conference.

[12]  Luciano Lavagno,et al.  Metropolis: An Integrated Electronic System Design Environment , 2003, Computer.

[13]  Ed F. Deprettere,et al.  An Approach for Quantitative Analysis of Application-Specific Dataflow Architectures , 1997, ASAP.

[14]  Roberto Passerone,et al.  A Platform-Based Taxonomy for ESL Design , 2006, IEEE Design & Test of Computers.

[15]  Alberto L. Sangiovanni-Vincentelli,et al.  Quo Vadis, SLD? Reasoning About the Trends and Challenges of System Level Design , 2007, Proceedings of the IEEE.

[16]  E.A. Lee,et al.  Synchronous data flow , 1987, Proceedings of the IEEE.

[17]  Ed F. Deprettere,et al.  A framework for rapid system-level exploration, synthesis, and programming of multimedia MP-SoCs , 2007, 2007 5th IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS).

[18]  Nikil D. Dutt,et al.  A Framework for Cosynthesis of Memory and Communication Architectures for MPSoC , 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[19]  Ed F. Deprettere,et al.  Systematic and Automated Multiprocessor System Design, Programming, and Implementation , 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[20]  Luigi Carro,et al.  Simulink-Based MPSoC Design Flow: Case Study of Motion-JPEG and H.264 , 2007, 2007 44th ACM/IEEE Design Automation Conference.

[21]  Edward A. Lee,et al.  A framework for comparing models of computation , 1998, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[22]  Ed F. Deprettere,et al.  Daedalus: Toward composable multimedia MP-SoC design , 2008, 2008 45th ACM/IEEE Design Automation Conference.

[23]  Ahmed Amine Jerraya,et al.  Flexible MPSoC platform with fast interconnect exploration for optimal system performance for a specific application , 2006, Proceedings of the Design Automation & Test in Europe Conference.

[24]  Yunheung Paek,et al.  A retargetable parallel-programming framework for MPSoC , 2008, TODE.

[25]  Christian Haubelt,et al.  Classification of General Data Flow Actors into Known Models of Computation , 2008, 2008 6th ACM/IEEE International Conference on Formal Methods and Models for Co-Design.

[26]  Ieee Circuits,et al.  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems information for authors , 2018, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[27]  Nikil D. Dutt,et al.  FABSYN: floorplan-aware bus architecture synthesis , 2006, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[28]  Frank Vahid,et al.  Binary synthesis , 2007, TODE.

[29]  Matthias Gries,et al.  Methods for evaluating and covering the design space during early design development , 2004, Integr..

[30]  Christian Haubelt,et al.  A generalized static data flow clustering algorithm for mpsoc scheduling of multimedia applications , 2008, EMSOFT '08.

[31]  Andreas Gerstlauer,et al.  System-on-Chip Environment: A SpecC-Based Framework for Heterogeneous MPSoC Design , 2008, EURASIP J. Embed. Syst..

[32]  Jürgen Teich,et al.  FunState-an internal design representation for codesign , 1999, 1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051).

[33]  Ed F. Deprettere,et al.  A Methodology to Design Programmable Embedded Systems - The Y-Chart Approach , 2001, Embedded Processor Design Challenges.

[34]  Li Shang,et al.  Reliable multiprocessor system-on-chip synthesis , 2007, 2007 5th IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS).

[35]  Andreas Gerstlauer,et al.  Specify-Explore-Refine (SER): From specification to implementation , 2008, 2008 45th ACM/IEEE Design Automation Conference.

[36]  Jean A. Peperstraete,et al.  Cycle-static dataflow , 1996, IEEE Trans. Signal Process..

[37]  Andy D. Pimentel,et al.  A systematic approach to exploring embedded system architectures at multiple abstraction levels , 2006, IEEE Transactions on Computers.

[38]  Sujit Dey,et al.  Design space exploration for optimizing on-chip communication architectures , 2004, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.