Design and verification of the Rollback Chip using HOP: a case study of formal methods applied to hardware design
暂无分享,去创建一个
[1] Richard M. Fujimoto,et al. Time Warp on a Shared Memory Multiprocessor , 1989, ICPP.
[2] Graham Birtwistle,et al. Current Trends in Hardware Verification and Automated Theorem Proving , 1989, Springer New York.
[3] Ganesh Gopalakrishnan,et al. SHILPA: a high-level synthesis system for self-timed circuits , 1992, ICCAD.
[4] John C. Cherniavsky,et al. Validation, Verification, and Testing of Computer Software , 1982, CSUR.
[5] R. M. Fujimoto,et al. Parallel discrete event simulation , 1989, WSC '89.
[6] Avra Cohn. Correctness properties of the Viper block model: the second level , 1989 .
[7] M. Gordon. HOL: A Proof Generating System for Higher-Order Logic , 1988 .
[8] Paolo Prinetto,et al. Formal verification of hardware correctness: introduction and survey of current research , 1988, Computer.
[9] Anthony Hall,et al. Seven myths of formal methods , 1990, IEEE Software.
[10] Ganesh Gopalakrishnan,et al. Design and Evaluation of the Rollback Chip: Special Purpose Hardware for Time Warp , 1992, IEEE Trans. Computers.
[11] Venkatesh Akella. An integrated framework for high-level synthesis of self-timed circuits , 1993 .
[12] Mark Bickford,et al. Formal verification of a pipelined microprocessor , 1990, IEEE Software.
[13] Randal E. Bryant,et al. Formal hardware verification by symbolic ternary trajectory evaluation , 1991, 28th ACM/IEEE Design Automation Conference.
[14] David R. Jefferson,et al. Virtual time , 1985, ICPP.
[15] Ernst-Rüdiger Olderog,et al. Verification of Sequential and Concurrent Programs , 1991, Texts and Monographs in Computer Science.
[16] Randal E. Bryant,et al. Formal verification of memory circuits by switch-level simulation , 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[17] Ellis Horowitz,et al. Abstract data types and software validation , 1978, CACM.
[18] Randy H. Katz,et al. Verifying a multiprocessor cache controller using random test generation , 1990, IEEE Design & Test of Computers.
[19] Robert S. Boyer,et al. A computational logic handbook , 1979, Perspectives in computing.
[20] P. Jain,et al. Some techniques for efficient symbolic simulation-based verification , 1992, Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors.
[21] Paul Hudak,et al. Conception, evolution, and application of functional programming languages , 1989, CSUR.
[22] Ganesh Gopalakrishnan,et al. SHILPA: a high-level synthesis system for self-timed circuits , 1992, 1992 IEEE/ACM International Conference on Computer-Aided Design.