Cellular automata are by definition highly parallel structures and are therefore capable of giving rise to massively parallel systems. The highly parallel nature of the cellular automata framework permits the creation of a multitude of structures, endowed with the flexibility to perform vast amounts of calculations concurrently. This flexibility and parallelism is also now present in a number of hardware platforms allowing for the adaptation of automata models into hardware. Presented herein is a binary tree adder implemented in cellular automata, able to perform substantial numbers of additions simultaneously. The number of calculations performed is only limited by the automata size. The binary tree adder is also more simplistic in terms of both states (25 used in total) and structure, than has been published before. Due to advances in hardware technology, it is a very realistic ambition for the future to be able to represent the tree adder structure on a cellular platform such as, an FPGA, allowing for such advantages as, increased robustness which is an area regarded as vital for developing the future of electronics hardware
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