A Logic-Efficient Recursive Doppler Rate Estimation Processor for LEO Satellites

Doppler frequency is a major channel impairment in mobile SATCOM receivers and LEO digital receivers. Due to its random nature, efficient Doppler frequency estimation and tracking algorithms is developed. Since computational resources especially on space-born platforms is costly, this paper shows how to implement Doppler frequency tracking with a minimum logic on FPGA or ASIC-based digital receivers. We show that Doppler frequency tracking is possible even with limited logic resources where only ADD, MULT and SHIFT operations could be used.