A 7NM Double-Pumped 6R6W Register File for Machine Learning Memory

A 7nm register file (RF) based on a 3-read and 3-write (3R3W) bitcell operates the access ports twice per clock cycle to achieve 6R6W operations per cycle for high-bandwidth (BW) on-die memory in machine learning (ML) processors. Silicon test-chip measurements demonstrate a 62% BW gain.