Circuit layout for different power requirements and corresponding method

A circuit comprises a plurality of first MuGFET devices (214, 216) which are applied to a substrate and having a first power level. In addition, a plurality of second MuGFET devices (230, 232, 240, 242) applied to the substrate and have a second level of performance. The first devices and the second devices are arranged in separate areas, allowing different processing of said first devices and second devices to adjust its performance characteristics. The circuit may be a SRAM, which pull-down transistors (214, 216) having a higher performance.