Simulation of the unified power flow controller performance using PSCAD/EMTDC

This paper investigates the performance of a unified power flow controller (UPFC) constructed by a back to back connection of a hysteresis current forced (HCF) converter and a pulse width modulated (PWM) inverter. The UPFC has been modelled at the component level using PSCAD/EMTDC program and the simulation results of the UPFC applications in steady state power flow control and dynamic stability enhancement are demonstrated in a test system. The performance of the proposed switching schemes and associated controllers in providing the desired UPFC internal characteristics such as constant DC bus voltage and bi-directional power transfer capability is illustrated.