Double Gate MOSFET circuit design

This paper presents a study of Double Gate MOSFET. The design possibilities of the Double Gate MOSFET will be explored in this paper which operates efficiently in sub threshold region to achieve ultra-low power and increases the performance of the circuit. The main objective of this paper is to understand the structure of Double Gate MOSFET while comparing them with traditional bulk MOSFET. The aim is to carry out simulations of Double Gate MOSFET and to improve the performance of MOSFET by studying the MOSFETs with double gate. Power consumption of the designed logic gates with Single Gate MOSFET and Double Gate MOSFET have been compared in this paper. Simulations are performed on SPICE tool at 45nm technology for a variety of inputs at different supply voltages and frequencies.

[1]  S. Akashe,et al.  Design and analysis of tunable analog circuit using double gate MOSFET at 45nm CMOS technology , 2013, 2013 3rd IEEE International Advance Computing Conference (IACC).

[2]  B. Forouzandeh,et al.  Full adder design with GDI cell and independent double gate transistor , 2012, 20th Iranian Conference on Electrical Engineering (ICEE2012).

[3]  Hesham F. A. Hamed,et al.  Low-Power Tunable Analog Circuit Blocks Based on Nanoscale Double-Gate MOSFETs , 2007, IEEE Transactions on Circuits and Systems II: Express Briefs.

[4]  T. Sekigawa,et al.  Calculated threshold-voltage characteristics of an XMOS transistor having an additional bottom gate , 1984 .

[5]  H.-S. Philip Wong Beyond the Conventional MOSFET , 2001, 31st European Solid-State Device Research Conference.

[6]  Shyam Akashe,et al.  Comparative Analysis of Low Power 10T and 14T Full Adder using Double Gate MOSFET at 45nm Technology , 2013 .