The extended admittance description that shall be introduced is a description in which pin currents are a function of pin voltages and additional signals. The extended admittance description exists for every linear and nonlinar analogue network element. That means, a general method for analog macromodelling is given by this description. An experimental implementation of a model interface uses the extended admittance description. It demonstrates that networks with usual and even unusual elements can be both described and simulated. The proposed description touches questions concerning the standardization of analogue extensions of VHDL