New AES Software Speed Records

This paper presents new speed records for AES software, taking advantage of (1) architecture-dependent reduction of instructions used to compute AES and (2) microarchitecture-dependent reduction of cycles used for those instructions. A wide variety of common CPU architectures--amd64, ppc32, sparcv9, and x86--are discussed in detail, along with several specific microarchitectures.

[1]  Guido Bertoni,et al.  Efficient Software Implementation of AES on 32-Bit Platforms , 2002, CHES.

[2]  Ingrid Verbauwhede,et al.  Cryptographic Hardware and Embedded Systems - Ches 2007 , 2008 .

[3]  Berk Sunar,et al.  Cryptographic Hardware and Embedded Systems - CHES 2005, 7th International Workshop, Edinburgh, UK, August 29 - September 1, 2005, Proceedings , 2005, CHES.

[4]  Daniel J. Bernstein,et al.  Cache-timing attacks on AES , 2005 .

[5]  Chester Rebeiro,et al.  Bitslice Implementation of AES , 2006, CANS.

[6]  Joan Daemen,et al.  AES Proposal : Rijndael , 1998 .

[7]  Richard Weiss,et al.  A Comparison of AES Candidates on the Alpha 21264 , 2000, AES Candidate Conference.

[8]  Robert Könighofer,et al.  A Fast and Cache-Timing Resistant Implementation of the AES , 2008, CT-RSA.

[9]  Mitsuru Matsui,et al.  How to Maximize Software Performance of Symmetric Primitives on Pentium III and 4 Processors , 2005, FSE.

[10]  Adi Shamir,et al.  Cache Attacks and Countermeasures: The Case of AES , 2006, CT-RSA.

[11]  Kazumaro Aoki,et al.  Fast Implementations of AES Candidates , 2000, AES Candidate Conference.

[12]  Mitsuru Matsui,et al.  On the Power of Bitslice Implementation on Intel Core2 Processor , 2007, CHES.

[13]  Matthew J. B. Robshaw,et al.  The eSTREAM Project , 2008, The eSTREAM Finalists.

[14]  John Waldron,et al.  AES Encryption Implementation and Analysis on Commodity Graphics Processing Units , 2007, CHES.

[15]  Ingrid Verbauwhede,et al.  Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings , 2007, CHES.

[16]  Christophe De Cannière.  eSTREAM Software Performance , 2008, The eSTREAM Finalists.

[17]  Doug Kuhlman,et al.  AES Software Implementations on ARM7TDMI , 2006, INDOCRYPT.

[18]  Luca Breveglieri,et al.  Efficient AES implementations for ARM based platforms , 2004, SAC '04.

[19]  Christof Paar,et al.  Cryptographic Hardware and Embedded Systems - CHES 2002 , 2003, Lecture Notes in Computer Science.

[20]  A. Biryukov.  A New 128-bit Key Stream Cipher LEX , 2005 .

[21]  Mitsuru Matsui,et al.  How Far Can We Go on the x64 Processors? , 2006, FSE.

[22]  Bruce Schneier,et al.  A Performance Comparison of the Five AES Finalists , 2000, AES Candidate Conference.

[23]  John Worley,et al.  AES Finalists on PA-RISC and IA-64: Implementations & Performance , 2000, AES Candidate Conference.