Information Theoretic Approach to Complexity Reduction of FIR Filter Design
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[1] David Bull,et al. Primitive operator digital filters , 1991 .
[2] Richard M. Karp,et al. The minimum-entropy set cover problem , 2005, Theor. Comput. Sci..
[3] Keshab K. Parhi,et al. VLSI digital signal processing systems , 1999 .
[4] Henry Samueli,et al. A VLSI Architecture for a High-Speed All-Digital Quadrature Modulator and Demodulator for Digital Radio Applications , 1990, IEEE J. Sel. Areas Commun..
[5] John G. Proakis,et al. Digital Signal Processing: Principles, Algorithms, and Applications , 1992 .
[6] Chip-Hong Chang,et al. Modified reduced adder graph algorithm for multiplierless FIR filters , 2005 .
[7] A. Prasad Vinod,et al. A new common subexpression elimination algorithm for implementing low complexity FIR filters in software defined radio receivers , 2006, 2006 IEEE International Symposium on Circuits and Systems.
[8] Giovanni De Micheli,et al. Synthesis and Optimization of Digital Circuits , 1994 .
[9] Miodrag Potkonjak,et al. Multiple constant multiplications: efficient and versatile framework and algorithms for exploring common subexpression elimination , 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[10] A. Prasad Vinod,et al. On the implementation of efficient channel filters for wideband receivers by optimizing common subexpression elimination methods , 2005, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[11] In-Cheol Park,et al. FIR filter synthesis algorithms for minimizing the delay and the number of adders , 2000, IEEE/ACM International Conference on Computer Aided Design. ICCAD - 2000. IEEE/ACM Digest of Technical Papers (Cat. No.00CH37140).
[12] Chiang-Ju Chien,et al. A novel common-subexpression-elimination method for synthesizing fixed-point FIR filters , 2004, IEEE Trans. Circuits Syst. I Regul. Pap..
[13] A. Prasad Vinod,et al. An efficient coefficient-partitioning algorithm for realizing low-complexity digital filters , 2005, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[14] Andrew G. Dempster,et al. Designing multiplier blocks with low logic depth , 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).
[15] H. Samueli,et al. A 150-mhz 43-tap Half-band Fir Digital Filter In 1.2-/spl mu/m Cmos Generated By Silicon Compiler , 1992, 1992 Proceedings of the IEEE Custom Integrated Circuits Conference.
[16] Lars Wanhammar,et al. ILP modelling of the common subexpression sharing problem , 2002, 9th International Conference on Electronics, Circuits and Systems.
[17] A. Dempster,et al. Use of minimum-adder multiplier blocks in FIR digital filters , 1995 .
[18] L. Wanhammar,et al. Design of high-speed multiplierless filters using a nonrecursive signed common subexpression algorithm , 2002 .
[19] Andrew G. Dempster,et al. Extended results for minimum-adder constant integer multipliers , 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).
[20] Y. Lim,et al. Discrete coefficient FIR digital filter design based upon an LMS criteria , 1983 .
[21] Kaushik Roy,et al. CSDC: a new complexity reduction technique for multiplierless implementation of digital FIR filters , 2005, IEEE Transactions on Circuits and Systems I: Regular Papers.
[22] O. Vainio,et al. A digital filter chip for ECG signal processing , 1994 .
[23] R. Hartley. Subexpression sharing in filters using canonic signed digit multipliers , 1996 .
[24] H. Samueli,et al. An improved search algorithm for the design of multiplierless FIR filters with powers-of-two coefficients , 1989 .
[25] Aleksandr Yakovlevich Khinchin,et al. Mathematical foundations of information theory , 1959 .
[26] Patrick Schaumont,et al. A new algorithm for elimination of common subexpressions , 1999, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[27] Chip-Hong Chang,et al. Design of Low-Complexity FIR Filters Based on Signed-Powers-of-Two Coefficients With Reusable Common Subexpressions , 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[28] Yong Ching Lim,et al. Design of Linear Phase FIR Filters in Subexpression Space Using Mixed Integer Linear Programming , 2007, IEEE Transactions on Circuits and Systems I: Regular Papers.
[29] Kenneth Rose,et al. A maximum entropy approach for optimal statistical classification , 1995, Proceedings of 1995 IEEE Workshop on Neural Networks for Signal Processing.
[30] Chip-Hong Chang,et al. Maximum likelihood disjunctive decomposition to reduced multirooted DAG for FIR filter design , 2006, 2006 IEEE International Symposium on Circuits and Systems.
[31] James E. Gunn,et al. A low-power DSP core-based software radio architecture , 1999, IEEE J. Sel. Areas Commun..
[32] Arda Yurdakul,et al. Multiplierless Realization of Linear DSP Transforms by Using Common Two-Term Expressions , 1999, J. VLSI Signal Process..